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TPS2813PE4 Datasheet

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TPS2813PE4 Price
The LTC4440's peak pull-up (Ql,)icurrent is 2.4A while the pull-down (Ni) resistance is l.6 I . The low impedance of Ni is required to discharge the power MOSFET's gate capacitance during high-to-low signal transitions. When the power MOSFET's gate is pulled low (gate shorted to source through Ni) by the LTC4440, its source (TS) is pulled low by its load (e.g., an inductor or resistor). The slew rate of the source/gate voltage causes current to flow back to the MOSFET's gate through the gate-to-drain capacitance (CGD). If the MOSFET driver does not have sufficient sink current capability (low output impedance), the current through the power MOSFET's CGD can mo- mentarily pull the gate high,turning the MOSFET back on.
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If the transient performance requirements exceed that specified in the data sheet, or the total amount ofload capacitance is above 3,000 pF, the selection of output capacitors becomes more important. For further guidance consult the separate application note, "Selecting Output Capacitors for PTH Products in Higb-Performance Applica- tions."
Layout Guidelines The stability of the regulator is sensitive to layout. It is strongly recommended that a continuous copper ground plane (1 0unce or greater) be used. In addition, component lead lengths and interconnects should be minimized, but should not exceed l/2 inch. Finally, the return lead of the compensation capacitor (CC) should be connected as close as possible to the GND pin of the lC.