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Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
TPI3057B 523    TI/SOP7.2    2001 
TPI3057B TI  SOP7.2  09+    523 
    SHENG ZHOU HE ELECTRONICS CO.,..
  • Contact:zhou
  • Tel:86-755-83397505.82883120
  • Fax:86-0755-88296852
  • Email: 1018686693@qq.com


TPI3057B TI/SOP7.2  管  2001    523 
    Shengzhen bangzheng electronic..
  • Contact:Lidan
  • Tel:86-755-83987295
  • Fax:0755-83014664
  • Email: JRDZ801@126.COM
TPI3057B     523    663 
    GD TECH UK
  • Contact:gdtechuk
  • Tel:44-870-4866758
  • Fax:44-1212402714
  • Email: gdtechuk@gmail.com


TPI3057B TI/SOP7.2    2001    523 
TPI3057B TI/SOP7.2    SOP    2001 
TPI3057B 523    TI/SOP7.2    2001 

TPI3057B Datasheet
. 8051 8 bit microprocessor - Provides low speed control functions - 30 Mhz execution speed at 4 cycles per instruction average - 768 Bytes of internal SRAM for general purpose scratchpad or program execution while re-flashing external ROM
TPI3057B Price

CHARACTERISTICS SYMBOL STPR805DB STPR810DB STPR815DB STPR820DB UNIT
Maximum Recurrent Peak Reverse Voltage VRRM 50 100 150 200 v
Maximum RMS Voltage VRMS 35 70 105 140 V
Maximum DC Blocking Voltage VDC 50 100 150 200 v
Maximum Average Forward Rectified Current @Tc=125'C I(AV) 8 A
Peak Forward Surge Current 8.3ms single half-sine-wave superimposed on rated load (JEDEC Metod) IFSM 100 A
Maximum Forward @TJ =25 C Voltage IF=8A @TJ =150'C VF 1.3 0.8 V
Maximum DC Reverse Current @TJ =25'C at Peak Reverse Voltage @TJ =100"C lR 10 500 uA
Typical Junction Capacitance (Note l) CJ 45 pF
Maximum Reverse Recovery Time (Note 2) TRR 25 ns
Typical Thermal Resistance (Note 3) RejC 3.0 j c/w
Operating and Storage Temperature Range TJ ,TSTG -55 to +150 c
NOTES :1.Measured at l.OMHz and applied reverse voltage of 4.OV DC. REV. 3, '13-Sep-2001, KTGA03


TPI3057B on stock
FEATURES/BENEFITS Enhanced N channel FET with no inherent diode to Vcc 5Q bidirectional switches connect inputs to outputs Pin compatible with the 74F245, 74FCT245, and 74FCT245T Low power CMOS proprietary technology Zero propagation delay, zero ground bounce Undershoot clamp diodes on all switch and control inputs QS32245 is 25Q version for low noise TTL-compatible control inputs Available in TSSOP, SOIC, QSOP and HQSOP
The bandgap voltage regulator uses the AVcc pin as its supply and produces a regulated output on the VREG pin. The regulator also supplies the analog supply voltage for the DAC. The regulator may be switched on/off by means of the ACl bit in the analog control register (ACONO). The regulator output may also be supplied to the XYDACBIAS and XYSOURCE pins by means of bits AC3 and AC4 respectively. The DECOUPLE pin is provided for decoupling the regulator output.