TPA311GLFS Datasheet| ltem | Symbol | Condit ions | Min | Typ | Max | Unit | | Collecor dark current | ICEO | VCEo=l OV | | | 0.5 | uA | | Light current | ICEL,}2 | VCE=5\[ Ev}3 | 40 | | 11 5 | uA | | Light current ratio | I CEL2/ 1 CEL1 | | 0 8 | | 1 2 | | | | IJRise time | t r | vcc=lov | | 8 | | S | | Swi tching speeds | UFall time | tf | l c=5mA RL=IOOQ | | 9 | | S | | Spectral sensitivity | A | -,71 0% | 4001100 | nm | | Peak wavelength | Ap | | | 800 | | nm | | Half angle | | | | ±60 | | | | | | | | | | |
TPA311GLFS Price| Product Code | Description | | cY31 38R62 | Warp Enterprise Verilog CPLD software for PCs | | |
TPA311GLFS on stock The system voltage supply lC described here is designed for the 12/24V board voltage supply systems in motor vehicles. To minimize power losses, provision is made for a step-down type switching regulator to transform the battery voltage to the lowest possi- ble initial value so as to supply the internal linear regulator with 5V. The linear regulator is equipped with monitors controlling different voltages, currents and the temperature. Accuracy of the regulators and monitors is provided by a bandgap acting in conjunction with an external reference resistance on pin I_SET. In addition to the voltage regulators, the system is further enhanced by a monitoring and control feature for microcontrollers designed in the form of a window watchdog geared to the reset logic system. A switch- ing input is provided for switching the system on and off. Another input controlling the switched-off state serves to determine whether the system is to be completely switched off (OFF mode) or whether the Standby mode is to be enabled, in which case minimum supply of the microcontroller on pin VLR is maintained. | | Specification | | | | Parameter | Min | Typ. | Max | Unit | Condition | | Overall RF Frequency Range LO Frequency Range IF Frequency Range | | 500 t0 1500 500 t0 1500 0.1 t0 250 | | MHz MHz MHz | T=250C,Vcc=3.6V,RF=881MHz, L0=966MHz @ -5dBm | | Cascaded Performance to IF1 Cascade Conversion Gain, Maxi- mum Cascade Conversion Gain, Mini- mum Cascade lP3 Cascade Noise Figure | 27 5 -15 | 30 21 -13 2 6 | 33 3 4 | dB dB dBm dB | CDMA Mode, IF SEL.=2.9V, 1kl balanced load, 2.5dB Image Filter Loss. By varying the gain of the second stage, a trade-off of gain and noise figure against lP3 can be made. VG" 0.2V VG>2.5V Referenced to input at Maximum Gain Single sideband, at Maximum Gain Setting | | Cascaded Performance to IF2 Cascade Conversion Gain, Maxi- mum Cascade Conversion Gain, Mini- mum Cascade lP3 Cascade Noise Figure | 18 5 -15 | 21 12 -12.5 3 0 | 24 4 0 | dB dB dBm dB | FM Mode, IF SEL.=OV, 850 I load, 2.5dB Image Filter Loss. By varying the gain of the second stage, a trade-off of gain and noise figure against lP3 can be made. VG" 0.2V VG>2.5 V Referenced to input at Maximum Gain Single sideband, at Maximum Gain Setting | | First Section (LNA) Noise Figure Input VSWR Input lP3 Gain Reverse Isolation Output VSWR | | 1.5 -8 16 23 | | dB dBm dB dB | The LNA section may be left unused. Power is not connected to pin l. The performance is then as specified for the Second Section (Mixer). | | | | | | |
|
