ADMap-3  > TP3054BW-M

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When a positive magnetic field is applied in the indicated direction (Figure 5) and the turn-on magnetic induction BOP is exceeded, the output of the Hall-effect IC will conduct (Operate Point). The output state does not change unless a reverse magnetic field exceeding the turn-off magnetic induction IBRPI is exceeded. In this case the output will turn off (Release Point; Figure 6).
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AC Testing Waveform: VIH = 2.4V and VIL - .45V; VOH = 2.OV and VOL= 0.8V Output Load: 1 TTL Load i- 100 pF Input Rise and FaIITimes: 10 ns Ambient Tempgrature: Commercial: Tamb = O'C to +70'C Industrial: Tamb = 40'C to +85'C Extended (Automotive): Tamb = -40'C to +125'C
27C512-70' 27C512-90* 27C512-10* 27C512-12 27C512-15
Parameter Sym Min Max Min Max Min Max Min Max Min Max Units Conditions
Address to Output Delay tACC 70 90 100 120 150 ns CE = OE/ vPP = VIL
CE to Output Delay tCE 70 90 100 120 150 ns OENPP - VIL
E to Output Delay tOE 30 40 40 50 60 ns CEVIL
E to Output High Impedancg tOFF 0 30 O 35 0 35 O 40 O 45 ns
Output Hold from Addrass, or VPP, whichever occurred first tOH 0 O O O O O ns


TIMING AND CONTROL The AD557 has data input latches that simplify interface t0 8- and 16-bit data buses. These latches are controlled by Chip Enable (CE) and Chip Select (CS) inputs. CE and CS are inter- nally "NORed" so that the latches transmit input data to the DAC section when both CE and CS are at Logic "0". If the application does not involve a data bus, a "00" condition allows for direct operation of the DAC. When either CE or CS go to Logic "l,"_the input data is latched into the registers and held until both CE and CS return to "0." (Unused CE or CS inputs should be tied to ground.) The truth table is given in Table I. The logic function is also shown in Figure 6.