The page write mode can be initiated during any write operation. Following the initial byte/word write cycle, the host can write up t0 63 bytes/words in the same manneras the first byte/word written. Each successive byte/word load cycle, started by the Write Enable(s) HIGH to LOW transition, must begin within 150 ps of the falling edge of the preceding Write Enable(s). lfa subsequent Write Enable(s) HIGH to LOW transition is not detected within 150 ps, the internal automatic programming cycle will commence.
TOTWHU04FU Price| | mm | m¨S |
| DIM | MIN | TYP | MAX | MIN | TYP | MAX |
| A | 0.90 | | 1.45 | 35.4 | | 57.1 |
| A1 | 0.00 | | 0.15 | 0.0 | | 5.9 |
| A2 | 0.90 | | 1.30 | 35.4 | | 51.2 |
| b | 0.35 | | 0.50 | 13.7 | | 19.7 |
| c | 0.09 | | 020 | 3.5 | | 7.8 |
| D | 2.80 | | 3.00 | 110.2 | | 118.1 |
| E | 2.60 | | 3.00 | 102.3 | | 118.1 |
| E1 | 1.50 | | 1 75 | 59.0 | | 68.8 |
| L | 0.35 | | 0.55 | 13.7 | | 21.6 |
| e | | 0.95 | | | 37.4 | |
| el | | 1.9 | | | 74.8 | |
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TOTWHU04FU on stock| Register Information DBS | Description BufferRAM of DDP (Device BufferRAM Select) |
| |
| Characteristic | Symbol | 1H1 | 1H2 | 1H3 | 1H4 | 1H5 | 1H6 | 1H7 | 1H8 | Unit |
| Peak Repetitive Reverse Voltage Working Peak Reverse Voltage DC Blocking Voltage | VRRM VRWM VR | 50 | 100 | 200 | 300 | 400 | 600 | 800 | 1000 | V |
| RMS Reverse Voltage | VR(RMS) | 35 | 70 | 140 | 210 | 280 | 420 | 560 | 700 | V |
| Average Rectified Output Current (Note l) @TA = 550c | 10 | 1 0 | A |
| Non-Repetitive Peak Forward Surge Current 8.3ms Single half sine-wave superimposed on rated load (JEDEC Method) | IFSM | 30 | A |
| Forward Voltage @IF = 1.OA | VFM | 1 0 | 1.3 | 1 7 | V |
| Peak Reverse Current @TA = 250C At Rated DC Blocking Voltage @TA = 1000c | IRM | 5 0 100 | UA |
| Reverse Recovery Time (Note 2) | t | 50 | 75 | nS |
| Typical Junction Capacitance (Note 3) | Cj | 20 | 15 | pF |
| Operating Temperature Range | Tj | -65 to +125 | oc |
| Storage Temperature Range | TSTG | -65 to +150 | oc |
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