TNY233，there are the best TNY233 suppiers all over the world here.These are the list and detailed contact method of TNY233 suppliers all over the world as follows.You can buy or get informations of TNY233 through email , message or tel.

suppliers of TNY233 and PDF data of TNY233

Part Numbert	Mfg	Packt	D/C	Descriptiont	Qty	Company/Contact
TNY233	ST	DIP8	2009	mystock	235	shenzhen longxiangwei electron.. Contact:xie Tel:86-755-82521002 Fax: Email: DK32689@YAHOO.COM.CN

TNY233 Datasheet


IT (AV)	>		18066	500	A
IT(RMS)	>		18066	785	A
ITSM	>		50Hz/60Hz1rJbL	9.1/10O	kA
12t			>c	416	kA2S
PGM				1 5	W
PG(AV)				5	W
IFGM	- r-)ii			5	A
VFGM	- r-)ii			1 0	V
VRGM				5	V
di/dt	>		IG=200rliA, VD= Y~VDRM, dIG/dt=0.2A/}1 S	200	A0s
Viso			AC1	2500	V
Tj				-40+125
Tstg				-40+125
			2.53.9	4.7	N-m
		c (M6)	( 2540)	(48)	(kgf-cm)
			8.810	1 1O	N-m
	J L	(M8)	( 90105)	(115)	(kgf-cm)
			1O1.4	1.5	N-m
		(M4)	( 1014)	(15)	(kgf-cm)
				1 1 00	g

TNY233 Price

PARAMETER	SYMBOL	CONDITIONS	MIN TYP MAX	UNITS
		fIN = 5MHz at -1dBFS	75.3
Sig nal-to-Noise	SNR	fIN = 15MHz at -1dBFS	72.1 75.1	dB
Ratio (Note l)	SNR	fIN = 35MHz at -1dBFS	74.8	dB
Sig nal-to-Noise		fIN = 5MHz at -1dBFS	75O
and Distortion	SINAD	fIN = 15MHz at -1dBFS	71 7 74.9	dB
(Note l)	SINAD	fIN = 35MHz at -1dBFS	71.1	dB
Spurious-Free Dynamic Range		fIN = 5MHz at -1dBFS	90O
(HD2 and HD3)	SFDR1	fIN = 15MHz at -1dBFS	84.0 90O	dBc
(Note l)	SFDR1	fIN = 35MHz at -1dBFS	74O	dBc
Spurious-Free Dynamic Range		fIN = 5MHz at -1dBFS	96O
(HD4 and Higher)	SFDR2	fIN = 15MHz at -1dBFS	85.0 94O	dBc
(Note l)	SFDR2	fIN = 35MHz at -1dBFS	92O	dBc
Two-Tone Intermod ulation Distortion	TTIMD	fINl = 10MHz at -7dBFS, fIN2 = 15MHz at -7dBFS	-85	dBc
Two-Tone Spurious-Free Dynamic Range	SFDRTT	fINl = 10MHz at -10dBFS < fINl < -100dBFS, fIN2 = 15MHz at -10dBFS < fIN2 < -100dBFS	-100	dBFS
DIGITAL OUTPUTS (DO-D14, DAV, DOR)
Digital Output-Voltage Low	VOL		O5	V
Digital Output-Voltage High	VOH		DRVcc - 0.5	V
TIMING CHARACTERISTICS (DVcc = DRVcC = 2.5V)
CLKP/CLKN Duty Cycle	Duty Cycle		50 +5	%
Effective Aperture Delay	tAD		230	ps
Output Data Delay	tDAT	(Note 3)	3.0 4.5 7.5	ns
Data Valid Delay	tDAV	(Note 3)	5.3 6.5 8.7	ns
Pipeline Latency	tLATENCY	(Note 3)	3	Clock cycles
CLKP Rising Edge to DATA Not Valid	tDNV	(Note 3)	2.6 3.8 5.7	ns
CLKP Rising Edge to DATA Valid (guaranteed)	tDGV	(Note 3)	3.4 5.2 8.6	ns
DATA Setup Time (Before DAV Rising Edge)	tSETUP	(Note 3)	tCLKP tCLKP tCLKP+ - 0.5 + 1.3 2.4	ns
DATA Hold Time (After DAV Rising Edge)	tHOLD	(Note 3)	tCLKN - tCLKN - tCLKN - 3.6 2.8 2.0	ns

TNY233 on stock

Part NO.	Max Freq.	Max Data Rate	Interface	Package
K4D623238B-GC/L33	300MHz	600Mbps/pin
K4D623238B-GC/L40	250MHz	500Mbps/pin
K4D623238B-GC/L45	222MHz	444Mbps/pin
K4D623238B-GC/L50	200MHz	400Mbps/pin	SSTL 2	144-Ball FBGA
K4D623238B-GC/L55	183MHz	366Mbps/pin
K4D623238B-GC/L60	166MHz	333Mbps/pin

The LT1076-5 uses atrue analog multiplierin the feedback loop. This makes the device respond nearly instanta- neously to input voltage fluctuations and makes loop gain independent of input voltage. As a result, dynamic behav- ior of the regulatoris significantly improved over previous designs.

Suppliers Datasheet
		Exact Matc