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STRG6153 T Datasheet

PIN NAME FUNCTION
MAX2323 MAX2325
1 1 RLNA LNA Bias-Setting Pin. For nominal bias, connect a 24kQ resistor to ground. This resistor value can be adjusted to alter the linearity of the input LNA in high-gain, high-linearity CDMA modes.
2. 10, 23 N C No Connection. Leave this pin floating.
2 PLNAIN High-Band RF Input Port. Blocking capacitor is required, which may be used as part of the matching network.
3, 8, 11, 12, 13, 18, 24, 25, 27 3, 8, 11, 12, 13, 17, 18, 24, 25, 27 GlxID Ground
4 4 CLNAIN Low-Band RF Input Port. Blocking capacitor is required, which may be used as part of the matching network.
5 5 SLEEP Logic Input. High shuts off entire device.
6 6 G2 Logic Input. See Tables l and 2 for details.
7 7 G1 Logic Input. See Tables l and 2 for details.
9 9 LO Lllxl Low-Frequency LO Input Port. Requires blocking capacitor, which may be used as part of an optional matching network.
10 LOHIN High-Frequency LO Input Port. Requires blocking capacitor, which may be used as part of an optional matching network.
14 14 MODE Logic Input. See Tables l and 2 for details.
15 15 FMOUT FM IF Output Port. Requires a pull-up inductor and a DC blocking capacitor, which may be used as part of the matching network.
16 16 Vcc 2.7V t0 3.6V Supply Pin. Must be capacitively bypassed near the pin.
17 BAND Logic Input. High selects high band (PCS). Low selects low band (cellular).
19, 20 19, 20 CDMA-, CDMA+ Differential Output Port for CDMA Mode. Requires pull-up inductors and blocking capacitors, which may be used as part of the matching network.
21 21 RBIAS Bias Setting Pin. For nominal bias, connect a 20kQ resistor to ground. This resistor value can be adjusted to alter the linearity of the mixers in all modes and the LNA in all modes except high gain and high linearity.
22 22 CMI×IN Low-Band Mixer Input Port. Requires blocking capacitor, which may be used as part of the matching network.
23 PMI×IN High-Band Mixer Input Port. Requires blocking capacitor, which may be used as part of the matching network.
26 PLNAOUT High-Band LNA Output Port. This port requires an external pull-up inductor and series capacitor as part of the matching network.
26 vcc 2.7 t0 3.6V Supply Pin. Bypassing is not necessary at this pin.


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Absolute Maximum Ratings Supply voltage (VDD to AGND) 7V Digital input voltage range to AGND . .-0.3V to VDD +0.3V Ref. input voltage range to AGND . . .-0.3V to VDD + 0.3V Output voltage at OUT from external source . .VDD + 0.3V Continuous current, any terminal . . . . . . . . +20mA