A write occurs during the overlap (twp) of a low CS and a low WE. t"m iS measured from the earlier of CS or WE going high to the end of write cycle. During this period, l/0 pins are in the output state. Input signals out of phase must not be applied. lfthe CS low transition occurs simultaneously with the WE low transition orafierthe WE low transition, outputs remain in a high impedance state. OE is continuously low. (OE=ViJ Dour is in the same phase as written data of this write cycle. Dou_is the read data of next address. lf CS is low during this period, 1/0 pins are in the output state. Input signals out of phase must not be applied. t"mz and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. These parameters are sampled and not 100% tested.
| PACKAGE PIN # | | |
| DIP-8 | S0-8 | PIN SYMBOL | FUNCTION |
| 1 | 1 | FLAG | Indicates whether current through the IGBT has reached a pre- set level. |
| 2 | 2 | SENSE+ | Positive input to current comparator. |
| 3 | 3 | SENSE- | Ground (SENSE-) for current sense resistor. |
| 4 | 4 | GND | Ground connection. |
| 5 | 5 | OUT | Output voltage to IGBT (MOSFET) gate. |
| 6 | 6 | CLI | Current limit input increase. |
| 7 | 7 | CTRL | Control input. |
| 8 | 8 | Vcc | Supply voltage. |
| | | |
