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suppliers of STR-F6654 and PDF data of STR-F6654

Part Numbert	Mfg	Packt	D/C	Descriptiont	Qty	Company/Contact
STR-F6654	SK		05+	original.new	500	ALTA ELECTRONICS LTD Contact:Jack Tel:86-755-83040484 Fax: Email: alta_electronics@yahoo.cn
STR-F6654	TO247-5	original p	500	cindy_ic@hotmail.com	SK	guansheng technology ltd Contact:cindy Tel:86-755-82567394 Fax:86-755-82567387 Email: cindy_ic@hotmail.com
STR-F6654					4536	E-Zone International (HK) Co.,.. Contact:Ella Tel:86-755-8339-1755, 8326-7835 Fax:86-755-8339-1772 Email: sales1@ez-international.cn

STR-F6654 Datasheet

SPECIFICATNONS (Tj = 250C UNLESS OTHERWISE NOTED)
Parameter	Symbol	Test Condition	Min	Typ	Max	Unit
Static
Gate Threshold Voltage	VGS(th)	VDS = VGS, ID = -250 yA	-0.45		-1.0	V
Gate-Body Leakage	IGSS	VDS=OV,VGS=8V			100	nA
		VDS = -8 V, VGS = 0 V			-1
Zero Gate Voltage Drain Current	IDSS	VDS = -8 V, VGS = 0 V, Tj = 700C			-5	yA
On-State Drain Currenta	ID(on)	VDS = -5 V, VGS = -4.5 V	-20			A
		VGS = -4.5 V, ID = -5.8 A		0.034	0.042	Q
		VGS = -2.5 V, ID = -4.9 A		0.050	0.060
Drain-Source On-State Resistancea	DS(on)	VGS = -1.8 V ID = -0.2 A		0.065	0.080
Forward Transconductancea	9fs	VDS = -4 V, ID = -5.8 A		16		S
Diode Forward Voltagea	VSD	Is = -1.7 A, VGS = 0 V		-0.8	-1.2	V
Dynamicb
Total Gate Charge	Qg			12 5	19
Gate-Source Charge	Ogs	VDS = -4 V, VGS = -4.5 V, ID = -5.8 A		2.4		nC
Gate-Drain Charge	Ogd	VDS = -4 V, VGS = -4.5 V, ID = -5.8 A		2.6		nC
Gate Resistance	Rg	f=l MHz		8		Q
Turn-On Delay Time	td(on)			20	30
Rise Time	tr	VDD = -4 V, RL = 4 Q		40	60
Turn-Off Delay Time	td(off)	ID -1.0 A, VGEN = -4.5 V, Rg = 6 Q		80	120	ns
Fall Time	tf	ID -1.0 A, VGEN = -4.5 V, Rg = 6 Q		60	90
Source-Drain Reverse Recovery Time	trr	IF = -1.7 A, di/dt = 100 Aiys		55	85

STR-F6654 Price

NOTES: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition above those indicated in the operation section of this specification is not implied. 2. For operating at elevated temperatures, the device must be derated based on +150YC maximum junction temperature. 3. This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying any voltages larger than the rated maxima. 4. Parameters are valid over specified temperature range. See ordering information table for applicable temperature range and operating supply range.
STR-F6654 on stock

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The low inpuc malfuncLion prevenuon circuit prevenLs incorrecc operation when c,he power supply is brought up or during brief voltage drops. After power is applied and the reference voltage reaches Vbe, the outpuL transislors are held off until Lhe power supply voltage becomes 2.72 V (Lypical). The dead time control pin volcage is held at che high level (Vref) and the short circuit prorecLion pin is held low (the initial state). Since this circuit has a hysteresis of 120 mV (Lypical) chaLtering due to power supply ripple can be prevenced to a cerLain extent.

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