| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact | |
| STPC1F81AAM | unknown | new and original | 11 |
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STPC1F81AAM Datasheet Data Memory The W79E648 can access up t0 64Kbytes of external Data Memory. This memory region is accessed by the MOVX instructions. Unlike the 8051 derivatives, the W79E648 contains on-chip lK bytes MOVX SRAM of Data Memory, which can only be accessed by MOVX instructions. These lK bytes of SRAM are between address OOOOH and 03FFH. Access to the on-chip MOVX SRAM is optional under STPC1F81AAM Price In the Asynchronous mode the memory is selected with Chip Enable E Low. The data outputs are en- abled by Output Enable G Low or disabled by Out- put Disable GD Low. Data is input by Write Enable W Low. In the Synchronous mode the memory latches ad- dresses and data (input or output) on the rising edge of the System Clock CLK. Burst address latching is enabled by_Load Burst Address LBA Low with Write/Read WR Low for a write cycle or High fora read cycle. Data outputs are enabled for reading on the rising edge of the System Clock CLK when Output En- able G is low. Data is input on the rising edge of the System Clock CLK when Write Enable W is Low. STPC1F81AAM on stock . Programmed pulse width tolerance: 5% or 2ns, whichever is greater * Inherent width (PWo):20ns typical * Inherent delay (Tro): 10ns + 2ns . Operating temperature: 00 t0 700 C . Supply voltage Vcc: 5VDC + 5% . Supply current: Icc = 200ma typical
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