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SKKH162-12 Datasheet
6. tDEV iS the output-to-output skew between any two devices operating under the same conditions (VDDO, VDD, ambient temperature, air flow, etc.) 7. t+ is measured with REF input rise and fall times (from 0.8V t0 2V) of 0.5ns. Measured from l.5V on REF t0 1.5V on FB. 8. Measured at 2V. 9. Measured at 0.8V. 10. tLOCK iS the time that is required before synchronization is achieved. This specification is valid only after VDDNDDO is stable and within normal operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until tPD iS within specified limits. 11. Lock detector may be unreliable for input frequencies less than approximately 4MHz, or for input signals which contain significant jitter.
SKKH162-12 Price
The HGTG40N6083 is a MOS gated high voltage switching device combining the best features of MOSFETs and bipolar transistors. The device has the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 250C and 1500C.
Input Capacitors The recommended input capacitance is determined by l.6 ampere minimum ripple current rating and lOOOpF mini- mum capacitance. Tantalum capacitors listed below cannot be used on the input bus since they are not rated for 12V operation. Ripple current and Equivalent Series Resistance (ESR) values are the major considerations along with tem- perature when selecting the proper capacitor.