SKIIP24EV10 Datasheet| | | | | | | VCE = -10 V | | | | | | | | T. = 250C | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r | | | | | | | | | | j | | | | | | | | | | | f | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
SKIIP24EV10 Price| PARAMETER | SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNITS | | Drain to Source Breakdown Voltage | BVDSS | ID = 0.250D:A, VGS = OV (Figure 9) | 50 | | | V | | Gate Threshold Voltage | VGS(TH) | VDS = VGS, ID = 0.2500:A (Figure 8) | 2 0 | | 4.0 | V | | Zero Gate Voltage Drain Current | IDSS | VDS = Rated BVDSS, VGS = OV | | | 1 | A | | Zero Gate Voltage Drain Current, | VDS = 0.8 x Rated BVDSS, VGS = OV, Tj = 1500C | | | 25 | o:A | | Gate to Source Leakage Current | IGSS | VcS= +20V | | | +100 | nA | | Drain to Source On Resistance (Note 2) | rDS(ON) | ID = 50A, VGS = 10V (Figure 7) | | | 0 022 | I | | Turn-On Time | t(ON) | VDD = 25V, ID @25A, RL = 1.01 , | | | 100 | ns | | Turn-On Delay Time | td(ON) | RGS = 6.67l , VGS = 10V (Figure 11) | | 15 | | ns | | Rise Time | tr | | 55 | | ns | | Turn-Off Delay Time | od(OFF) | | 60 | | ns | | Fall Time | tf | | 15 | | ns | | Turn-Off Time | t(OFF) | | | 100 | ns | | Total Gate Charge | Qg(tot) | VGS= 0-20V | VDD - 40V, ID = 50A | | | 160 | nC | | Gate Charge at 10V | Qg(10) | VGS= O-10V | RL = 0.8 I , IG(REF) = 1.5mA (Figure 11) | | | 80 | nC | | Threshold Gate Charge | Qg(th) | VGS= 0-2V | | | 6 | nC | | Thermal Resistance Junction to Case | RejC | | | | 1.14 | oc/W | | Thermal Resistance Junction to Ambient | RejA | T0-220 | | | 62 | oC/W | | T0-247 | | | 30 | oc/W | | | | | | | | |
SKIIP24EV10 on stock| 25.4 1/4-2 | CASE STYLE AND DIMENSIONS 1.000) i: ,x. - .NN- -f- . i ii, lIR6 7SMFA TS ', . ~ BUNF-2A ' | A: 10.1 (0 521 4 00 10.16l IM"H_ =16024, ~:iAX 6 1 (0 24) 7 n in 7H) '14"28 UNF 2A 11 10 1 (0 151161 (1 DO} rdAX Conforms to JEDEC Outline D0-203AB (D0-5) Dimensions in Millimaters and (inches) | | | |
The TC58FVT641/B641 can be programmed in either byte or word units. Auto-Program Mode is set using the Program command. The program address is latched on the falling edge of the WE signal and data is latched on the rising edge of the fourth Bus Write cycle (with WE controD. Auto programming starts on the rising edge of the WE signalin the fourth Bus Write cycle. The Program and Program Verify commands are automatically executed by the chip. The device status during programming is indicated by the Hardware Sequence flag. To read the Hardware Sequence flag, specify the address to which the Write is being performed. During Auto Program execution, a command sequence for the bank on which execution is being performed cannot be accepted. To terminate execution, use a hardware reset. Note that if the Auto-Program operation is terminated in this manner, the data written so far is invalid. Any attempt to program a protected block is ignored. In this case the device enters Read Mode 3 lts after the rising edge of the WE signalin the fourth Bus Write cycle. If an Auto-Program operation fails, the device remains in the programming state and does not automatically return to Read Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware reset is required to return the device to Read Mode after a failure. If a programming operation fails, the block which contains the address to which data could not be programmed should not be used. The device allows Os to be programmed into memory cells which contain a l. Is cannot be programmed into cells which contain Os. If this is attempted, execution of Auto Program will fail. This is a user error, not a device error. A cell containing o must be erased in order to set it t0 1.
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