SKHI23W Datasheet| | | vca= ao vx | | | | | VCB= 20 | | VrA: | | | | | | | | | | | HOR^M_L vca = 1.} v | IZED TO: | | /- | | | TA =25'C | | | | | | IF =O | | | | | TA-AMaIENT tEMPEMWHE-'C | 3. DARK ICEO CURRENT VS TEMPERATURE 4.OUTPUT CURRENT VS TEMPERATURE | 5.OUTPUT CHARACTERISTICS | | | | | |
SKHI23W Price Figure 4 shows the device in hold mode: switch SWl con- nects the sampling capacitor to ground, maintaining the sampled voltage, and switch SW2 unbalances the compara- tor. The control logic then instructs the charge-redistribution DAC to add or subtract fixed amounts of charge from the sampling capacitor until the comparator is balanced. When the comparator is balanced, the digital word supplied to the DAC is the digital representation of the analog input voltage. The device moves from hold mode to track mode on the 13th rising edge of SCLK. SKHI23W on stock| | | o | l | | _v o l | | | }j 1 | { | | | | AA A A | | | 1 1 | | J U U UU U U | | } Ai | -e | 1 | I | | --zl | L | -I~IWl | | b1 | | | 1 6 r_ 11 MH = ^^ | V1 | ZU | | crh Hi r'h r'h r:i | t n n n crh | | \ /p'n l index | | J | | [ | | 7 | | I | | ~_rJ ~_rJ ~_rJ ~_rJ ~_rli~_rJ ~_rJ ~_rJ ~_rJ ~_rJ | | 1 10 0 5 10 mm scale DIMENSIONS (inch dimens ons are derived from the original mm dimensions) | | UNIT | A max | Ai min. | A2 max. | b | b1 | c | DO) | E(1) | e | e1 | L | ME | MH | W | max zo) | | | | mm | 4 2 | 0 51 | 3 2 | 1 73 1 30 | 0 53 0 38 | 0 36 0 23 | 26 92 26 54 | 6 40 6 22 | 2 54 | 7 62 | 3 60 3 05 | 8 25 7 80 | 10 0 8 3 | 0 254 | 2 0 | | | inches | 0 17 | 0 020 | 0 13 | 0 068 0 051 | 0 021 0 015 | 0 014 0.009 | 1 060 1 045 | 0 25 0 24 | 0 10 | 0 30 | 0 14 0 12 | 0 32 0 31 | 0 39 0 33 | 0 01 | 0 078 | | Note | | 1. Plastic or metal protrusions of 0.25 mm m axim um per side are not included. | | OUTLINE | REFERENCES | EUROPEAN | | | | | VERSION SOT146-1 | IEC | JEDEC | EIAJ SC603 | | PROJECTION | ISSUE DATE 95-05-24 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| PARAMETER | SYMBOL | MIN. | MAX. | UNIT | CONDITIONS. | | Drain-Source Breakdown Voltage | BVDSS | 60 | | V | ID=lmA, VGS-OV | | Gate-Source Threshold Voltage | VGS(th) | 1.3 | 3 | V | ID=1 1T1A, VDS- VGS | | Gate-Body Leakage | IGSS | | 100 | nA | VGS-+ 20V, VDS-OV | | Zero Gate Voltage Drain Current | IDSS | | 10 100 | LLA LLA | VDS-60V, VGS-OV VDS-48V, VGS-OV, T=1250c(2) | | On-State Drain Current (1) | ID(on) | 3 | | A | VDS-25V, VGS-10V | | Static Drain-Source On-State Resistance (1) | RDS(on) | | 1 1.5 | Q Q | VGS-1 0V, ID=1.5A VGS-5V, ID=0.5A | | Forward Transconductance | 9fs | 300 | | mS | VDS-25V,ID=1.5A | | Input Capacitance (2) | qss | | 100 | pF | | | Common Source Output Capacitance (2) | Co ss | | 60 | pF | VDS-25V, VGS-OV, f=l M Hz | | Reverse Transfer Capacitance (2) | Crss | | 20 | pF | | Turn-On Delay Time (2)(3) | td(on) | | 8 | ns | | | Rise Time (2)(3) | tr | | 12 | ns | VDD~25V, ID=1.5A, VGEN | | Turn-Off Delay Time (2)(3) | td(off) | | 12 | ns | =10V | | Fall Time (2)(3) | tf | | 15 | ns | | | | | | |
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