| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact | |
| SKD31F-16 | 100 |
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| SKD31F-16 | SEMIKRON | 05+ |
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SKD31F-16 Datasheet
SKD31F-16 Price Features co Provides a Robust Driver Interface Between DC Relay Coil and Sensitive Logic Circuits co Optimized to Switch Relays from 3.0 V t0 5.0 V Rail co Capable ofDriving Relay Coils Rated up t0 2.5 W at 5.0 V co Internal Zener Eliminates the Need of Free-Wheeling Diode co Internal Zener Clamp Routes Induced Current to Ground for Quieter Systems Operation co Low VDS(ON) Reduces System Current Drain co Pb-Free Package is Available SKD31F-16 on stock The RSDS path to the panel timing controller contributes toward lowering radiated EMI, reducing system power consumption and eliminates one of the two pixel busses used in typical XGA, SXGA TFT LCD panels. This single 9-bit differential bus conveys the 18-bit color data for XGA, SXGA panels. This port is usually connected with the A/D Converter and is used for speech encoding. The timing of this port is the similar as that ofthe serial output interface, except that the signals ofthe Second Serial Data Input Interface are inputs. This port also can connect with various ADCs through the setting in the Start-up Configuration or command register SetSAI2. Two bits setting is described below : |
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