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SKBZ28-08 Datasheet

PARAMETER DESCRIPTION MIN TYP MAX UNIT
t1 Serial CLK Period 50 ns
t2 Serial CLK High Time 13 ns
t3 Serial CLK Low Time 13 ns
t4 Minimum Data Setup Time 5 ns
t5 Minimum Data Hold Time 5 ns


SKBZ28-08 Price

PROM Location Location Contents
OOh ETHERNETADDRESS 0
Olh ETHERNETADDRESS 1
02h ETHERNETADDRESS 2
03h ETHERNETADDRESS 3


SKBZ28-08 on stock
An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (l/00 through l/07) iS written into the memory location addressed by the address present on the address pins (Ao through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH.

M 1
II I Il |
f - Tj= =25
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|I J - J - J - Tj= 25C