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RS1072C Datasheet

The RESET pins are l/Os; therefore,the CAT1161/2 can act as a signal conditioning circuit for an externally applied manual reset. The inputs are edge triggered; that is, the RESET input in the CAT1161/2 will initiate a reset timeout after detecting a low to high transition and the RESET input will initiate a reset timeout after detecting a high to low transition.
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UNIT	A	A1 max	bp	c	D	E	e	e1	HE	Lp	Q	V	W	y
mm	1 1 0 8	0 1	0 30 0 20	0 25 0 10	2 2 1 8	1 35 1 15	1 3	0 65	2 2 2 0	0 45 0 15	0 25 0 15	0 2	0 2	0 1

RS1072C on stock


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The 'ACTQ16543 contains sixteen non-inverting transceiv ers with TRI-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins may be shorted together to ob- tain ful: 16-bit operation. The following dfascnption applies to each byte. For data flow from A to B, for example, the A-to- B Enable (eEn) input must be LOW in ordar to enter data

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		Exact Matc