| Pin | Symbol | Function |
| 1 | GND | Ground; reference potential; internal connection to Pin 10, 11, 13 and 20; cooling tab |
| 2 | DI | Serial data input; 5-V CMOS logic level input with internal pull-down; receives serial data from the control device, DI expects a 16-bit control word with LSB being transferred first |
| 3 | CS | Chip-select input; 5-V CMOS logic level input with internal pull-up; low = serial communication is enabled, high = disabled |
| 4 | CLK | Serial clock input; 5-V CMOS logic level input with internal pull down; controls serial data input interface and internal shift register (fmax = 2 MHz) |
| 5 | INH | Inhibit input; 5-V logic input with internal pull-down; low = standby, high = normal operating |
| 6.7 | VS | Power supply output stages HSl, HS2 and HS3 |
| 8 | LS3 | Low-side driver output 3; power-MOS open drain with internal reverse diode: overvoltage protection by active zenering; short-circuit protection; diagnosis for short and open load |
| 9 | nC | Not connected |
| 10 | GND | Ground (see Pin l) be consistant |
| 1 1 | GND | Ground (see Pin l) |
| 12 | HS3 | High-side driver output 3; power-MOS open drain with internal reverse diode: overvoltage protection by active zenering; short-circuit protection; diagnosis for short and open load |
| 13 | GND | Ground (see Pin l) |
| 14 | HS2 | High-side driver output 2 (see Pin 12) be consistant |
| 15 | LS2 | Low-side driver output 2 (see Pin 8) |
| 16 | HS1 | High-side driver output l (see Pin 12) |
| 17 | LS1 | Low-side driver output l (see Pin 8) |
| 18 | DO | Serial data output; 5-V CMOS logic level tri-state output for output (status) register data; sends 1 6-bit status information to the microcontroller (LSB is transferred first); output will remain tri-stated unless device is selected by CS = low, therefore, several ICs can operate on only one data output line only. |
| 19 | VCC | Logic supply voltage (5 V) |
| 20 | GND | Ground (see Pin l) |
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