| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact | |
| RR0816P-104-D | 5000 |
|
![]() |
||||
| RR0816P-104-D | 5000 |
|
![]()
|
RR0816P-104-D Datasheet
RR0816P-104-D Price . Fast Byte-Program Operation - Byte-Program Time: 20 ps (typical) - Chip Program Time: 0.7 seconds (typical) for SST27SF256 1.4 seconds (typical) for SST27SF512 2.8 seconds (typical) for SST27SF010 5.6 seconds (typical) for SST27SF020 RR0816P-104-D on stock Along with the variable bond pad spacing the l/0 output transistor section does not have a fixed width. Previous technologies utilized a design approach where the desired full function buer was designed for a maximum current taking one pad location with the usual current in the range of twenty four milliamps. The approach followed in CB35000 is to have identical twenty five micron wide output transistor slices stepped around the die. Each slice contains one set of protection diodes to the external power rails and eight P and eight N transistors. The transistors are specifically laid out and selectively non salicided for ESD protection and latch up prevention. These slices are paralleled to meet the current needs of the user, for example, to construct a 24mA sink and 12mA source LVTTL buffer, a number of slices would be used. The next group of devices that makes up the l/0 circuits is again Features : High f;ain-bandwidth producz) . Higb breakdown voltage (VC;O(~O~~M;Iz) . Small reverse transfer capacitance and excellent high frequency characteristics (Cre=2.2pF/NPN, 2.7pF/PNP) ' ' . Complementary PNP and NPN types . Adoption of FBET process . Micale8s type (T0126 plastic package) |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||