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Package Type		Operating Temperature	Output Voltage
T0-220	T0-263	Range (TA)	Output Voltage
CM1582DCN220	CM1582DCN263	0+70	1.8V
CM1582KCN220	CM1582KCN263	0+70	2.5V
CM1582SCN220	CM1582SCN263	0+70	3.3V
CM1582ZJCN220	CM1582ZJCN263	0+70	5.OV
CM1582CN220	CM1582CN263	0+70	ADJ

RPE132X7R103M100 on stock

lts on-chip phase-locked loop (PLL) generates a stable 622.08 Mb/s reference based upon an external 38.88 MHz TTL reference. The PLL is based on a VCO constructed from integrated reactive components, which form a low-jitter, high-Q differential tank circuit. Both frequency- and phase-detect circuits reliably acquire and hold lock in worst-case SONET jitter conditions and scrambling patterns. The lock-detect circuitry signals when the CDR acquires frequency lock.

ltem	Symbol	Conditions	Ratings	Unit
Storage Temperature	Tstg		-55 t0 150	oC
Operating Junction Temperature	Tj		150	oC
Maximum Reverse Voltage	VRM		800	V
Average Rectified Forward Current	IO	50Hz sine wave, R-load, On glass-epoxy substrate Ta=250C	3.5	A
Average Rectified Forward Current	IO	50Hz sine wave, R-load Tc=980C	6.0	A
Peak Surge Forward Current	IFSM	60Hz sine wave, Non-repetitive lcycle peak value, Tj=250C	200	A
Current Squared Time	12t	Ims t < 10ms Tj=250C, Rating ofper diode	90	A2S
Dielectric Strength	Vdis	Terminals to case, AC l minute	2.0	kV
Mounting Torque	TOR	(Recommended torque:0.5N-m)	0.8	N-m

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