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SPE is the Serial Port Enable. It goes high at the start of the transmission and goes back low at the end. SPC is the Serial Port Clock. It is stopped high when SPE is low (no transmission). SPD is the Serial Port Data. It is driven by the falling edge of SPC. It should be captured at the rising edge of SPC. The Read Register or Write Register command consists of 16 clocks or bit. A bit duration is the time between two falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the rising edge of SPE and the last bit (bit 15) starts at the last falling edge of SPC just before the falling edge of SPE. bit 0 : RW bit. When 0, the data (D7:0) is written into the device. When l, the data (D7:0) from the device is read. In this case, the LISIR02 will drive SPD at the start of bit 8. bit l-3 : chip ID. The chip ID for the LISIR02 is ID(2:0)=110. The device accepts the command only when the ID is valid (equal t0 110). bit 4-7 : address AD(3:0). This is the address field for the registers. See section 2 for more details. bit 8-15 : data D(7:0). This is the data that will be written (read) into (from) the register whose address is AD(3:0).
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