ADMap-14  > QS3VH257

suppliers of QS3VH257 and PDF data of QS3VH257

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
QS3VH257         SOP 
    Windy In l Elecronics Te ch (..
  • Contact:sophie
  • Tel:86--755-82579618
  • Fax:
  • Email: sophie@windy-hk.com
QS3VH257     04+    10 
    KLD INTERNATIONAL TRADING CO.
  • Contact:Chen Allen
  • Tel:86-755-82814328
  • Fax:86-755-82814338
  • Email: jack@kldic.com


QS3VH257         10 
QS3VH257 IC  SOP      10 
    Full Star Electronics
  • Contact:Jessie
  • Tel:86-852-65516814
  • Fax:
  • Email: fullsic@tom.com
QS3VH257   Spot    SOP   10 
    BIRD is NEST TECHNOLOGY CO.,LI..
  • Contact:miss
  • Tel:86-755-82546655 82546518
  • Fax:86-755-82546528
  • Email: yz_su@163.com
QS3VH257 N/A  SOP      10 
    RANTLEEASTELECTRONICTRADINGCO
  • Contact:Ms.JessicaWong
  • Tel:86-754-84475086
  • Fax:86-754-84471197
  • Email: rantle-east@vip.163.com

QS3VH257 Datasheet
Vo Adjust: This pin is used to trim the output voltage over a typical range of +15 % of nominal. The adjust- ment method uses an external resistor. The resistor is connected from Vo Adjust to either the GND or (+)Sense, in order to adjust the output either up or down, respec- tively. Consult the related application note for the adjust limits on a specific part. Vsense: An external remote sense input is provided to allow the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy Vse7ise should be connected to VOUT. If desired, Vsense may also be left open circuit.
QS3VH257 Price

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QS3VH257 on stock
Terminals: Contact Areas Readily Solderable Polarity: Cathode to Case(Reverse Units Are Available Upon Request and Are Designated By An "R" Suffix, i.e. DD202R or DD204SR) Polarity: Red Color Equals Standard, Black Color Equals Reverse Polarity Mounting Position: Any
The 74ALVT162344 is a l-to-4 address driver used in applications where four separate memory locations must be addressed by a single address. The 74ALVT162344 is designed with 30I series resistance in both the pull-up and pull-down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters.