ADMap-14  > QS-3125Q

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QS-3125Q Datasheet
The input section of the AD1877 uses autocalibration to correct any dc offset voltage present in the circuit, provided that the inputs are ac coupled. The single-ended dc input voltage can swing between 0.7 V and 3.8 V typically. The AD1877 antialias input circuit requires four external 470 pF NPO ceramic chip filter capacitors, two for each channel. No active electronics are needed. Decoupling capacitors for the supply and reference pins are also required.
QS-3125Q Price
. NPN Silicon Microwave Power Transistor . Common Base Configuration . Broadband Class C Operation . High Efficiency InterdigitatedGeometry . Diffused Emitter Ballasting Resistors . Gold Metalizarion System * Intemallnput Impedance Matching . Hermeric'Metal/Ceramic Package
QS-3125Q on stock

No Function
1 TE cooler, negative
2 Thermistor lead 1
3 Thermistor lead 2
d La ser diode anode
5 Laser diode cathode
6 Photodiode cathode
7 Photodiode anode
8 TE cooler, positive


No Symbol Name I/O unctIOn
1 MCLKCONT Oscillator Input l Controls builts-in clock generation circuit with external R
2 TEST1 Test pin l Test mode change "H" Normal / "L" Test (Be sure connect to Vcc at Normal mode)
3 CLOCK CLOCK l Clock input via serial bas
4 LATCH LATCH l Latch input via serial bas
5 DATA DATA l Data input via serial bas
6 AD CONT A/D Control Decide the time constant of A/D
7 DA CONT D/A Control Decide the time constant of D/A
8 Vcc Power Supply
g DELAYSOURCE OUT Delay source output O (L+R) or( L-R) or (MIC) signal Output
1 0 TEST OUT Test output O Memory /Mute /Sampling Data Output (Test mode) (Be sure to open at Normal mode)
1 1 LPFl IN l Low Pass Filter l Input 1 l
12 LPFl IN 2 Low Pass Filter l Input 2 l Prefilter placed before A/D convertor for digital delay
1 3 LPFl OUT Low Pass Filter l Output O
14 AD INT IN A/D Integrator Input l To form D/A convertorlntegrator by connecting
1 5 AD INT OUT A/D Integrator Output O external capacitor
16 GND GND