| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
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QRMM0010 Datasheet All voltages referenced IO VSS \t BB must be applied before and removed afier other supply voltages Output voltage will swing from VSS to VCC under open cirCU,T conditions For purposes of maintaimng data in power down mode. VCC mav be reduced to \/SS without affecting refresh operations. VOH(minl specificalion is not guaranteed in this mode. Several cvcles are required afier power-up before proper device operation is achieved Any 8 cycles which perform refresh are adequate Currenl is proportional to cycle rate; maximum cu rrent is measured at The fastest c\'cle rate ICC depends upon output loading. The VCC supply is connected ro the output buffer oniv Output is disabled lopen-circun) when CAS is at a logic 1 o v i, Vout < +5 5 V QRMM0010 Price Rapid Programming Algorithm A 50 ~s CE pulse width is used to program. The address is set to the first location. Vcc is raised t0 6.5V and BYTENpp is raised t0 13.OV. Each address is first programmed with one 50 ~s eE pulse without verification. Then a verification/ reprogramming loop is executed for each address. In the event a word fails to pass verification, up t0 10 successive 50 ccs pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. Vpp is then lowered t0 5.OV and Vcc t0 5.OV. All words are read again and compared with the original data to determine if the device passes or fails. QRMM0010 on stock Features . One mold small size package . Wide supply-voltage range : 2.7V t0 5.5V . Shielded against electrical field disturbance . High immunity against ambient light disturbances (Logic Controller Adaptation) . Available for carrier frequencies between 32.7KHz t0 56.9KHz . TTL and CMOS compatible
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