| | | REG102NA REG102GA REG102UA | |
| PARAMETER | CONDITION | MIN | TYP | MAX | UNITS |
| OUTPUT VOLTAGE Output Voltage Range VOUT REG102-2.5 REG102-2.8 REG102-2.85 REG102-3.0 REG102-3.3 REG102-5 REG102-A Reference Voltage VREF Adjust Pin Current IADJ Accuracy Over Temperature vs Temperature dVOUT/dT vs Line and Load Over Temperature | lour = 5mA t0 250mA, VIN = (Vour + 0.4V) t0 10V VJN = (Vou r + 0.6V) t0 10V | 2 5 | 2.5 2.8 2.85 3.0 3.3 5 1.26 0.2 +0.5 50 +0.8 | 5.5 1 +1 .5 +7.3 +l.0 +7.8 | V V V V V V V V cCA % % ppmflC % % |
| DC DROPOUT VOLTAGE(2) VDROP For all models Over Temperature | lour = 5mA IOUT = 250mA IOUT = 250mA | | 4 150 | 10 220 270 | mV mV mV |
| VOLTAGE NOISE f = 10Hz t0 100kHz Vn Without CNR (all models) With CNR (all fixed voltage models) | CNR = 0, COUT = 0 CNR = O.010:F, COUT = 10ccF | 2 | 3ccVrmsN . Vou 'ocVrmsN . VOU | T | o:Vrms o:Vrms |
| OUTPUT CURRENT Current Limit(3} ICL Over Temperature Short-Circuit Current Limit lsc | | 340 300 | 400 150 | 470 490 | mA mA mA |
| RIPPLE REJECTION f = 120Hz | | | 65 | | dB |
| ENABLE CONTROL VENABLE High (output enabled) VENABLE VENABLE Low (output disabled) IENABLE High (output enabled) IENABLE IENABLE Low (output disabled) Output Disable Time Output Enable Softstart Time | VENABLE = 1.8V to VIN, VIN = 1.8V t0 6.5(4) VENABLE = OV t0 0.5V COUT = 1.OffF, RLOAD = 13l COUT = 1.OccF, RLOAD = 13l | 1 8 -0.2 | 1 2 50 1 5 | VIN 0.5 100 100 | V V nA nA mS |
| THERMAL SHUTDOWN Junction Temperature Shutdown Reset from Shutdown | | | 160 140 | | ][C IC |
| GROUND PIN CURRENT Ground Pin Current IGND Enable Pin Low | lour = 5mA lour = 250mA VENABLE " 0.5V | | 400 600 0 01 | 500 800 0 2 | A A cc |
| INPUT VOLTAGE VIN Operating Input Voltage Range(s} Specified Input Voltage Range Over Temperature | VIN > 1.8V VIN > 1.8V | 1.8 Vou r+ 0.4 VOUT + 0.6 | | 10 10 10 | V V V |
| TEMPERATURE RANGE Specified Range Tj Operating Range Tj Storage Range TA Thermal Resistance SOT23-5 Surface-Mount OJA S0-8 Surface-Mount OJA SOT223-5 Surface-Mount ejC OJA | Junction-to-Ambient Junction-to-Ambient Junction-to-Case Junction-to-Ambient | -40 -55 -65 | 200 150 15 See Figure 8 | +85 +12 5 +150 | IC IC IC IC/W IC/W IC/W IC/W |
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| - 1 | | | | ~ | | | | | | | | |
| | | | | | | | | --l- l | | |
| | | | | | | | | _ Crss II II II II | | |
| | | | | | | | | II l | | |
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QMB111PX on stock T he AD SP-2100 Family Assembler and Linker allow the creation ofprograms and data structures requiring multiple boot pages during execution. T he BR signal is recognized during the booting sequence. T he bus is granted afier loading the current byte is completed. BR during booting may be used to implement booting under control ofa host processor.
NOTES: 1. PACKAGE MATERIAL: ALUMINA LOADED BOROSILICATE GLASS. 2. LEAD, BASE, COVER MATERIAL: KOVARTM (#7052 CORNING). 3. PLATING: ELECTROLYTIC GOLD 50 MICROINCHES MIN., OVER ELECTROLYTIC NICKEL 50 MICROINCHES MIN. 4. DIMENSIONS ARE IN INCHES [MILLIMETERS]. 5. TOLERANCES: +.005 [0.13] UNLESS OTHERWISE SPECIFIED. 6. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND.
