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Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  

QM40-32PL-CV Datasheet

Number of Contacts A B J K L
4 4 0 1 5 3.1 3 9 2.5
5 4 5 2 0 3.6 4 4 3.0
6 5 0 2 5 4.1 4 9 3.5
8 6 0 3 5 5.1 5 9 4.5
9 6 5 4 0 5.6 6 4 5.0
10 7 0 4 5 6.1 6 9 5.5
12 8 0 5 5 7.1 7 9 6.5
13 8 5 6 0 7.6 8 4 7.0
14 9 0 6 5 8.1 8 9 7.5
15 9 5 7 0 8.6 9 4 8.0
16 10 0 7 5 9.1 9 9 8.5
17 10 5 8 0 9.6 10 4 9.0
18 11 0 8 5 10.1 10 9 9.5
20 12 0 9 5 11.1 11 9 10.5


QM40-32PL-CV Price

IVeasured under pulse conditions , T = 1250C )' / / / / ) .r )' / )


QM40-32PL-CV on stock

NAME TYPE FUNCTION
TPOS/ TNRZ O Transmit Positive Data Output/Transmit NRZ Data Output. If BIN = 0 in the register, the LIU interface is in dual-rail (POS/NEG) mode. In this mode, the transmit formatter outputs the serial data stream in alternate mark inversion (AMI) format. TPOS = 1 signals an external LIU to drive a positive pulse on the line, while TNEG = 1 tells the LIU to drive a negative pulse on the line. If BIN = 1, the LIU interface is in binary (NRZ) mode. In this mode, the transmit formatter outputs the serial data stream in binary format on the TNRZ pin. TNRZ = 1 indicates a l in the data stream, while TNRZ = 0 indicates a 0. If TCLKI = 0 in the register, data is clocked out of the formatter on the rising edge of TCLK. If TCLKI = 1, data is clocked out on the falling edge of TCLK. :TPOSH = 1 forces TPOS/TNRZ high. :TPOSI = 1 inverts the polarity of TPOS/TNRZ. Setting both TPOSH = 1 and TPOSI = 1 forces TPOS/TNRZ low.
TNEG O Transmit Negative Data Output. If BIN = 0 in the register, the LIU interface is in dual-rail (POS/NEG) mode. In this mode, the transmit formatter outputs the serial data stream in AMI format. TPOS = 1 signals an external LIU to drive a positive pulse on the line, while TNEG = 1 tells the LIU to drive a negative pulse on the line. If BIN = 1, the LIU interface is in binary (NRZ) mode. In this mode the transmit formatter outputs the serial data stream in binary format on the TNRZ pin, and TNEG is driven low. If TCLKI = 0 in the register, data is clocked out of the formatter on the rising edge of TCLK. If TCLKI = 1, data is clocked out on the falling edge of TCLK. :TNEGH = 1 forces TNEG high. :TNEGI = 1 inverts the polarity of TNEG. Setting both TNEGH = 1 and TNEGI = 1 forces TNEG low.
TCLK O Transmit Clock Output. TCLK is used to clock data out of the transmit formatter on TPOS/TNEG (dual-rail LIU interface mode) or TNRZ (binary LIU interface mode). If TCLKI = 0 in the register, data is clocked out of the formatter on the rising edge of TCLK. If TCLKI = 1, data is clocked out on the falling edge of TCLK. TCLK is normally a buffered (and optionally inverted) version of TICLK. When either line loopback or payload loopback is active, TCLK is a buffered (and optionally inverted) version of RCLK. When a clock is not present on TICLK and :LOTCMC = 1, TCLK is a buffered (and optionally inverted) version of RCLK.


SB820F SB830F SB840F SB850F SB860F SB880F SB8100F U NITf
Maximum Recurrent Peak Reverse Voltaqe 20 30 40 50 60 80 1 00 V
Maximum RMS Voltaqe 1 4 21 26 35 42 56 80 V
Maximum DC Blockinq Voltaqe 20 30 40 50 60 80 1 00 V
Maximum Average Forward Rectified Current at Tc=100 CJ 8O A
Peak Forward Surge Current, 8.3ms single half sine wave superimposed on rated load(J EDEC method) 1 50 A
Maximum Forward Voltaqe at 8.OA per element O55 0.75 0.85 V
Maximum DC Reverse Current at Rated Tc=25 CJ DC Blocking Voltage per element Tc=100 CJ O5 50 mA
TypicaIThermal Resistance Note R ~KJA 60 CJ/W
Operating and Storage Temperature Range T.i -50 TO +150