| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
QM20-32PA-EP Datasheet
QM20-32PA-EP Price Notes: No terminal should ever be allowed to go more positive than Vp 2 Measured with nominal power supply voltages 3 Integration time can be longer if the array is cooled ancVor if the application can tolerate a larger percentage of dark signal 4 Mostly due to use of on-chip buffers. When recharge mode is used (buffers biased off), power dissipation is on the order of l mW QM20-32PA-EP on stock NOTES: 1. Guaranteed by design. 2. Line and Load Regulation specifications include the effect of self heating. 3. Limit current in or out of pin 3 t0 50nA and capacitance on pin 3 t0 30pF. 4. i\VOT iS definad as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as a percentage of 5V. AVOT=IV5yV IXlOO Switch mode momentary or alternate action, .. t0 4 po~e Contact mater~a~ s-l e~for appi at~o~s >~5 V and 20 TA Opera ir g~ra~e~ 3 2 mm A~tuat rg for~e >~5 N Initialcontact resistan e r ew~ ~O n test~urre~t~A AC ac ord rg to~EC 341-1,testi Break rg~apa ity at o~m~c~oad~- 250 / 5 A A~ 250 V / 0,2 A DC Me to i a lfet rre > 2 x10e operat~o~s E~e~r~alfeirre~at o mic oad~- 5 Al 250 V AC > 50'000 0peratlons 4 A /250 V AC > 60'000 0perations 2 A /250 V AC > 200'000 0peratlons 1 A /250 V AC > 400'000 0perations |
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