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QM100DY-H-BKO-C1869H05 Datasheet
NONVOLATILE STORE A STORE cycle is performed when NE, E and W and low and G is high. While any sequence that achieves this state will initiate a STORE, only W initi- ation (STORE cycle #1) and E initiation (STORE cycle #2) are practical without risking an unintentional SRAM WRITE that would disturb SRAM data. During a STORE cycle, previous nonvolatile data is erased and the SRAM contents are then programmed into nonvolatile elements. Once a STORE cycle is initi- ated, further input and output are disabled and the DQ0_7 pins are tri-stated until the cycle is complete. If E and G are low and W and NE are high at the end of the cycle, a READ will be performed and the out- puts will go active, signaling the end of the STORE.
QM100DY-H-BKO-C1869H05 Price
Dual channels for diversity +30 dBm Input IP3 +12.5 dBm Input PldB RF: 1900 - 2200 MHz IF: 150 - 300 MHz Single supply operation (+5 V) Pb-free 6mm 28-pin QFN package Low-side LO configuration Common footprint with other PCS/UMTS/cellular versions
QM100DY-H-BKO-C1869H05 on stock

IIII Vcf = 600V _ _
VCE=15V
RG = 5011 -- Tj = 1251:
rofi tOn
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RATING SYMBOL VALUE UNIT
Repetitive peak off-state voltage TIC126D TIC126M TIC126S TIC126N VDRM 400 600 700 800 V
Repetitive peak reverse voltage TIC126D TIC126M TIC126S TIC126N VRRM 400 600 700 800 V
Continuous on-state current at (or below) 700C case temperature (see Note l) IT(RMS) 12 A
Average on-state current (1800 conduction angle) at (or below) 700C case temperature (see Note 2) IT(AV) 7.5 A
Surge on-state current at (or below) 250C case temperature (see Note 3) ITM 100 A
Peak positive gate current (pulse width .< 300 us) IGM 3 A
Peak gate power dissipation (pulse width i 300 us) PGM 5 W
Average gate power dissipation (see Note 4) PG(AV) 1 W
Operating case temperature range Tc -40 to +110 oC
Storage temperature range Tstg -40 to +125 oC
Lead temperature l.6 mm from case tor 10 seconds TL 230 oC