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QLMA86002 Datasheet

I Recommended Bias Resistor Va ues
I Supply Voltage, Vcc (V) 5 8 10 12 15 20
I Bias Resistor, Rcc(Q) 22 81 122 162 222 322


QLMA86002 Price

TYPICAL
SYMBOL PARAMETER CONDITIONS HC2G HCT2G UNIT
tPHL/tPLH propagation delay nA to nY CL = 15 pF; Vcc = 5V 10 12 ns
Cl input capacitance 1 1 pF
CO output capacitance 1.5 1.5 pF
CPD power dissipation capacitance output enabled; notes l and 2 1 1 1 1 pF
per buffer output disabled; notes l and 2 1 1 pF


QLMA86002 on stock
Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: HammerbrookstraBe 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541. Fax. +91 22 493 0966
In the low data rate mode, the interval between the falling edge of one RFAl ON pulse to the rising edge of the next RFAl ON pulse tPRI iS set by a resistor between the PRATE pin and ground. The in- terval can be adjusted between 0.1 and 5 ps. In the high data rate mode (selected at the PWIDTH pin) the receiver RF amplifiers oper- ate at a nominal 50%-50% duty cycle. In this case, the start-to-start period tPRC for ON pulses to RFAl are controlled by the PRATE re- sistor over a range of 0.1 t0 1.1 ps.