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Part Numbert	Mfg	Packt	D/C	Descriptiont	Qty	Company/Contact
QL4016PL84	QUICKLOGIC	PLCC	00+		5	A-RICH HK LECTRON CO.,LIMITED Contact:JING ZHOU Tel:86-755-33377586 Fax:86-755-33377578 Email: ARICH2@yahoo.cn
QL4016PL84	QUICKLOGIC	00+	PLCC		5	ShenzhenYingzhuoerTechnologyCo.. Contact:Mr.xubing Tel:0086-0755-61667202 Fax:0086-0755-82566550 Email: all_money@126.com
QL4016PL84	QUICKLOGIC		PLCC		20018	LEEKEELECTRONICSTECHNOLOGYDEVE.. Contact:Mr.Jack Tel:86-0755-83957756/83987609 Fax:86-0755-83987609 Email: hklike@yahoo.cn

QL4016PL84 Datasheet

				CY7C1345F
Parameter	Description	Test Conditions		Min	Max	Unit
VDD	Power Supply Voltage			3.135	3.6	V
VDDQ	1/0 Supply Voltage			2.375	VDD	V
VOH	Output HIGH Voltage	VDDQ = 3.3V VDD = Min.,IOH = -4.0 mA		2.4		V
VOH	Output HIGH Voltage	VDDQ = 2.5V VDD = Min.,IOH = -1.0 mA		2.0		V
VOL	Output LOW Voltage	VDDQ = 3.3V, VDD = Min., IOL = 8.0 mA			0.4	V
VOL	Output LOW Voltage	VDDQ = 2.5V, VDD = Min., IOL = 1.0 mA			0.4	V
VIH	Input HIGH Voltage	VDDO= 3.3V		2.0	VDD +0.3V	V
VIH	Input HIGH Voltage	VDDQ= 2.5V		1.7	VDD +0.3V	V
VIL	Input LOW VoltageV]	VDDO= 3.3V		-0.3	0.8	V
VIL	Input LOW VoltageV]	VDDO= 2.5V		-0.3	0.7	V
IX	Input Load Current (except ZZ and MODE)	GND < Vi < VDDQ		5	5
	Input Current of MODE	Input= Vss		-30		LA
	Input Current of MODE	Input= VDD			5	LA
	Input Current of ZZ	Input= Vss		-5
	Input Current of ZZ	Input= VDD			30	lrA
102	Output Leakage Current	GND < Vi < VDD, Output Disabled		-5	5
IOS	Output Short Circuit Current	VDD = Max., VOUT= GND			-300	l.cA
IDD	VDD Operating Supply Current	VDD = Max., IOUT = 0 mA,	7.5-ns cycle,133 MHz		225	mA
		f = fMAX= 1/tCYC	8.O-ns cycle, 117 MHz		220	mA
			10-ns cycle, 100 MHz		205	mA
			15-ns cycle, 66 MHz		195	mA
ISB1	Automatic CE Power-Down	Max. VDD, Device Deselected,	7.5-ns cycle,133 MHz		90	mA
	Current-TTL Inputs	VIN > VIH or VIN < VIL, f = fMAX,	8.O-ns cycle, 117 MHz		85	mA
		inputs switching	10-ns cycle, 100 MHz		80	mA
		inputs switching	15-ns cycle, 66 MHz		60	mA
ISB2	Automatic CE Power-Down Current-CMOS Inputs	Max. VDD, Device Deselected, VIN >VDD - 0.3V or VIN < 0.3V, f = 0, inputs static	All speeds		40	mA

QL4016PL84 Price

SQW/OUT (Square Wave/ Output Driver) - When enabled, the SQWE bit set t0 1, the SQW/OUT pin outputs one of four square wave frequencies (1 Hz, 4 kHz, 8 kHz, 32 kHz). The SQW/OUT pin is open drain which requires an external pullup resistor. SQW/OUT will operate with either Vcc or Vbat applied
QL4016PL84 on stock

The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm t0 0.330mm finished hole size on a 0.5mm t0 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results.

Bus Hold Capabilities on alll/Os and Dedicated Inputs In addition to ISR capability, a new feature called bus-hold has been added to all FLASH370i l/Os and dedicated input pins. Bus-hold, which is an improved version of the popular internal pull-up resistor, is a weak latch connected to the pin that does not degrade the device's performance. As a latch, bus-hold recalls the last state of a pin when it is three-stated, thus reducing system noise in bus-interface applications. Bus-hold additionally allows unused device pins to remain unconnected on the board, which is particularly useful during prototyping as designers can route new signals to the device without cutting trace connections to Vcc or GND.

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