| j^I¨| |
| . JEDEC registered lN746 thru lN759A and lN4370 |
| thru lN4372A series |
| . Internal metallurgical bond option available by adding |
| a "-1" suffix |
| . Also available in JAN, JANTX, and JANTXV |
| qualifications per MIL-PRF-19500/127 by adding the |
| JAN, JANTX, or JANTXV prefixes to part numbers for |
| desired level of screening as well as -1" suffix; (e.g. |
| JANTXIN751A-1, JANTXVIN758C-1, etc.) |
| . Military Surface Mount equivalents also available in |
| D0-213AA by adding a UR-1 suffix in addition to the |
| JAN, JANTX, and JANTXV prefix; e.g. |
| JANTXIN962BUR-1 (see separate data sheet) |
| ~ Commercial Surface Mount equivalents available as |
| MLL746 to MLL759A and MLL4370 to MLL4372A |
| including the "-1" suffix in the D0-213AA MELF style |
| package (consult factory for others) |
| . D0-7 glass body axial-leaded Zener equivalents are |
| also available |
| ,Jn:I,JLijlvlIJ^.NIC[d- |
| . Operating and Storage temperature: -650C to +1750C |
| . Thermal Resistance: 250 0C/W junction to lead at 3/8 |
| (10 mm) lead length from body, or 3100C/W junction to |
| ambient when mounted on FR4 PC board (1 0z Cu) |
| with 4 mm' copper pads and track width l mm. length |
| 25 mm |
| . Steady-State Power: 0.5 watts at TL< 500C 3/8 inch |
| (10 mm) from body or 0.48 W at TA < 25 C when |
| mounted on FR4 PC board as described for thermal |
| resistance above (also see Figurel) |
| . Forward voltage200 mA: 1.1 volts |
| . Solder Temperatures: 260 0C for 10 s (max) |
| INPUT Voltage Range | | 4.75 10.8 13.5 21.6 43.2 | 5 12 15 24 48 | 5.25 13.2 16.5 26.5 52.8 | VDC VDC VDC VDC VDC |
| ISOLATION Rated Voltage Test Voltage Resistance Capacitance Leakage Current | 60Hz, 10 Seconds Viso = 240VAC, 60Hz | 500 500 | 10 80 10 | 18 | VDC Vpk pF UArms |
| OUTPUT Rated Power Voltage Setpoint Accuracy Temperature Coefficient Ripple and Noise Tracking | Rated Load, Nominal VN BW = DC tolOMHz BW = DC t0 2MHz -VOUT Tracks +VOUT | | 5 +0.02 30 5 +1 | +1 | w % %/oc mVp-p mVrms % |
| TRANSIENTRESPONSE 5v Output Models (Within +1%) All Other Models (Within +0.1%) | Rated Load to No Load No Load to Rated Load Rated Load to No Load No Load to Rated Load | | 50 100 30 100 | | LJs US IJS US |
| REGULA110N Line Regulation Load Regulation 5v Output Models All Other Models | High Line to Low Line Rated Load to No Load | | +0.02 +0.04 +0.02 | | % % % |
| GENERAL Switching Frequency Package Weight MTTFperMIL-HDBK-217,Rev.E* Ground Benign Fixed Ground NavaISheltered Airborne Uninhabited Fighter | Circuit Stress Method TA = +250C TA = +700C TA = +350C TA = +350C TA = +350C | | 170 50 762,000 46,000 230,000 127,000 29,000 | | kHz g Hr Hr Hr Hr Hr |
| TEMPERATURE Specification Operation Storage | | -25 -40 | +25 | +70 +85 +110 | oc oc oc |
| Page 2 | PWR70XX 11/98 REV F | | | | |
| | | | | |
The MICRF500 circuit has a lock detector feature that indi- cates whether the PLL is in lock or not. A logic high on Pin 15 (LOCKDET) means that the PLL is in lock. The phase detector output is converted into a voltage that is filtered by the external capacitor C23, connected to Pin 14, LDC. The resulting DC voltage is compared to a reference window set by bits Ref0- Ref5.The reference window can be stepped up/down linearly between OV, Ref0 - Ref5 = 1, and Ref0 - Ref5 = 0, which gives the highest value (DC voltage) of the reference window.The size of the window can either be equal to two (Ref6 = 1) reference steps or four reference steps (Ref6 = 0).
