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PBCY58-VIII Datasheet
The LTC1287 is a 3V data acquisition component which contains a serial l/0 successive approximation A/D con- verter. The device specifications are guaranteed at a supply voltage of 2.7V. It uses LTCMOS'W' switched ca- pacitor technology to perform a 12-bit unipolar, A/D conversion. The differential input has an on-chip sample- and-hold on the (+) input.
PBCY58-VIII Price

CY62148B-70
Parameter Description Test Conditions Min Typ.[3] Max Unit
VOH Output HIGH Voltage Vcc = Min., IOH = -1 mA 2.4 V
VOL Output LOW Voltage Vcc = Min., IOL = 2.1 mA 0.4 V
VIH Input HIGH Voltage 2.2 Vcc+0.3 V
VIL Input LOW Voltage -0.3 0.8 V
IIX Input Leakage Current GNDViVcc 1 +1
102 Output Leakage Current GND ' Vi " Vcc, Output Disabled 1 +1 oA
lcc Vcc Operating f = fMAX = 1/tRC Com/lnd'I 12.5 20 mA
Supply Current f=l MHz IOUT =0 mA Vcc = Max., 2.5 mA
ISB1 Automatic CE Power-Down Current -TTL Inputs Max. Vcc, CE > VIH VIN > VIH or VIN u VIL, f = fMAX Com/ Ind'I 1.5 mA
ISB2 Automatic CE Power-Down Current -CMOS Inputs Max. Vcc, CE > Vcc - 0.3V, VIN > VCC - 0.3V, or VIN " 0.3V, f =0 Com/ Ind'I 4 20


PBCY58-VIII on stock

TYPE NUMBER REVERSE STANO-OFF VOLTAGE BREAK DOWN VOLTAGE VBR MINIMUM TEST CURRENT MAXIMUM REVERSE LEAKAGE MAXIMUM CLAMPING VOLTAGE PEAK PULSE CURRENT
Vwm V(BRl IT lDO Vwm ve@ IPP IPP**
VOLTS VOLTS mA UA VOLTS AMPS
i.qKC)Ui.U j.U 6.40 10 600 13.7 29.20 1.4KESD5.OA 5.0 6.40 10 600 13.2 29.85 1.4KESD6.0 6.0 6.67 10 600 14.8 27.00 1.4KESD6.OA 6.0 6.67 10 600 14.0 28.50 1.4KESD6.5 6.5 7.22 10 400 16.0 24.94 1.4KESD6.5A 6.5 7.22 10 400 15.2 26.32 1.4KESD7.0 7.0 7.78 10 150 17.3 23.12 1.4KESD7.OA 7.0 7.78 10 150 16.4 24.42 1.4KESD7.5 7.5 8.33 1.0 50 18.5 21.57 1.4KESD7.5A 7.5 8.33 1.0 50 17.5 22.81 1.4KESD8.0 8.0 8.89 1.0 25 19.8 20.20 1.4KESD8.OA 8.0 8.89 1.0 25 18.7 21.37 1.4KESD85 8.5 9.44 1.0 5 20.9 19.10 1.4KESD8.5A 8.5 9.44 1.0 5 19.8 20.16 1.4KESD9.0 9.0 10.0 1.0 1.0 22.2 18.02


All Intersil semiconductor products are manufactured, assembled and tested under IS09000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No Iicense is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com