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PB464-04900 Datasheet

At power-on, the POR resets the internal registers. This defines the receiver default configuration (see gray rows on tables 4, 7 & 8). In this configuration, the SPI is disabled and ROME02 sends raw data on the MOSI line. This default configuration enables the circuit to operate as a standalone receiver without any external control. After POR, RESETB forces a low level. Therefore an external pull-up resistor should be used in order to avoid entering configuration mode. Figure 12: Writing into configuration registers
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TRANSFER CHARACTERISTICS
DC Characteristic Test Conditions			Symbol	Min	Typ	Max	Units
*Collector Output Current(1,2) (4N32, 4N33)				50 (500)
(4N29, 4N30)	(IF = 10 rTiA, VCE = 10 V, lB = 0)		lc (CTR)	10 (100)			mA(%)
(4N31)	(IF = 10 rTiA, VCE = 10 V, lB = 0)		lc (CTR)	5 (50)			mA(%)
*Saturation Voltage(2) (4N29, 4N30, 4N32, 4N33)						1O	V
(4N31)		(IF = 8.0 mA, lc = 2.0 mA)	VCE(sat)			1.2	V

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ORDER	ORDER NUMBER	MARKING	TEMP.	PACKAGE	PIN OPTION
NUMBER	(Pb free)	MARKING	RANGE	PACKAGE	1	2	3	4
G9205TFIT	G9205TFITf	G9205	-400C to +850C	T0-220F-4	VIN	Vo	GND	Vdis
G9205THIT	G9205THITf	G9205	-400C to +850C	T0-220F-4	VIN	Vo	GND	Vdis

The CMCPC1102A is a 10-channel backplane interface/ termination IC specifically designed for CompactPCI redundant system-slot cards. The CMCPC1102A allows CompactPCI boards to interface to the backplane and provides the versatility to use system cards in any slot (system or peripheral). Per the CompactPCI specifica- tion, the CMCPC1102A provides a 10Q termination resistor for each channel to terminate the transmission line stub on the board. An integral series switch and associated control signal (SW_EN) permits connection/ disconnection of the channel, so that the device side of the circuit may be isolated from the backplane side.

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