OP215BIAJ Datasheet| Thermal resistance, chip case | RthjC | " 0.6 | K/W | | Diode thermal resistance, chip case | RthjCD | 1 | | Insulation test voltage, t = 1min. | Vis | 2500 | Vac | | Creepage distance | | 1 6 | mm | | Clearance | | 1 1 | | DIN humidity category, DIN 40 040 | | F | sec | | IEC climatic category, DIN IEC 68-1 | | 55 /15056 | | | | |
OP215BIAJ Price| PARAMETER | SYMBOL | CONDITIONS | IlIN | TYP | uAx. | UNIT | | Input leakage current | ILl | VIN - VCC or OA5 V | -10 | | 10 | | | VCC supply current | lcc | | | | 75 | mA | | VPP supply current | IPP | CE= PGMVil | | | 50 | mA | | Input "Low' voltage | VIL | | -0.1 | | 0.45 | V | | Input 'High' voltage | VIH | | 2.4 | | Vcc+ 0.3 | V | | Output -Law' voltage | VOL | 101= 16 mA | | | 0.45 | V | | Output High' voltage | VOH | IOH=-4mA | 2.4 | | | V | | | | | | | |
OP215BIAJ on stock No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-preverition equipment and the like, the failure of which may direotly or indirectly cause injury, death or propelly loss. I Anyone purchasing any products described or oontained herein for an above-mentionad use shall: Oi Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and alf claims and litigation and all damages, cost and expenses associated with such use: CD Not impose anlt responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO" LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. _lnformation (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production, SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. | Pin Name | Function | Description | | DB(0:9) CLK STSQ R/L E/O XFR VIDO-VID5 Vl, V2 VREFHI, VREFLO INV DVCC DGND AVCCx AGNDx BYP STBY | Data Input Clock Start Sequence Rig ht/Left Select Even/Odd Select Data Transfer Analog Outputs Reference Voltages Full-Scale References Invert Digital Power Supply Digital Supply Return Analog Power Supplies Analog Supply Returns Bypass Standby | lO-Bit Data Input. MSB = DB(0:9). Clock Input. The state of STSQ is detected on the active edge of CLK.A new data loading sequence begins on the next active edge ofCLK after STso is detected HIGH. The active CLK edge is the rising edge when E/O is held HIGH. It is the falling edge when E/O is held LOW. A new data loading sequence begins on the left with Channel o when this input is LOW, and on the right with Channel 5 when this input is HIGH. The active CLK edge is the rising edge when this input is held HIGH and the falling edge when this input is held LOW. Data is loaded sequentially on the rising edges of CLK when this input is HIGH and on the falling edges when this input is LOW. XFR is detected and a data transfer is initiated on a rising CLK edge when this input is held HIGH. Data is transferred to the video outputs on the next rising CLK edge after XFR is detected. These pins are directly connected to the analog inputs of the LCD panel. The voltage applied between these pins set the reference levels of the analog outputs. The voltage applied between these pins sets the full-scale output voltage. When this pin is HIGH,the analog output voltages are above VMID. When LOW, the analog output voltages are below VMID. VMID is a hypothetical reference level set by the voltages applied to Vl and V2. VMID is equal to (Vl + V2)/2. Digital Power Supply. This pin is normally connected to the analog ground plane. Analog Power Supplies. Analog Supply Returns. A 0.1 UF capacitor connected between this pin and AGND ensures optimum settling time. When HIGH, the internal circuits are debiased and the power dissipation d rops to a minimum. | | | |
Won-Top Electronics Co., Ltd. No. 44 Yu Kang North 3rd Road, Chine Chen Dist., Kaohsiung, Taiwan Phone: 886-7-822-5408 0r 886-7-822-5410 Fax: 886-7-822-5417 Email: sales@wontop.com Internet: http://www.wontop.com
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