| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact | |
| NJM2722 | JRC | 8500 |
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NJM2722 Datasheet J u n ction Tem pe ratu re ....... .............. 1 25'fC Operating Temperature Range (Note 2) LT1 949EMS8 ................ ..-40'fC t0 85'fC LT1 949ES8/LT1 9491S8 ............. ..-40'rC t0 85'rC Storage Temperature ........ ........... -65'1C t0 150'fC Lead Temperature (Soldering, 10sec) .................. 300'fC NJM2722 on stock o o o o o o o o o o o o c n o r _ C D L r ) . f 3 C \ l r 1 ) J N 3 H H [ l o J ( l d j I l 0 3 S H l f \ 3 H Receiver Status Bits In addition to the data word, three status bits (parity error, framing error, and received break) are also appended to each data character in the FIFO (overrun is not). Status can be provided in two ways, as programmed by the error mode control bit in the mode register. In the 'character' mode, status is provided on a character-by-character basis; the status applies only to the character at the top of the FIFO. In the 'block' mode, the status provided in the SR for these three bits is the logical-OR of the status for all characters coming to the top of the FIFO since the last 'reset error' command was issued. In either mode reading the SR does not affect the FIFO. The FIFO is 'popped' only when the RHR is read. Therefore the status register should be read prior to reading the FIFO.
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