suppliers of N5421-1S and PDF data of N5421-1S

tLZWE(2) WE HIGH to Low-ZOutput 3 - 5 - ns Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of l.5V, input pulse levels of 0.6 t0 2.4V and output loading specified in Figure la. 2. Tested with the load in Figure lb. Transition is measured +500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE~ LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 4. Tested with OE HIGH.