| Parameter | Symbol | Conditions | Min Typ'Max | Units |
| DC CHARACTERISTICS RHEOSTAT I Resistor Differential NL2 Resistor Nonlinearity Error2 Nominal Resistor Tolerance3 Resistance Temperature Coefficient Wiper Resistance Nominal Resistance Match | \iIODE Spec R-DNL R-INL kB kB/CT Rw CJRIRO | fications Apply to All VRs RWB, VA = No Connect RWB, VA = No Connect VAB = VDD, Wiper = No Connect IW = 1 V/RAB CH l to CH 2,VAB = VDD , TA = +25IC | -0.25 +0.1 +0.25 -0.5 +0.1 +0.5 -30 +30 700 45 100 0.2 1 | LSB LSB % ppm/YC I % |
| DC CHARACTERISTICS POTENTIOM Resolution Differential Nonlinearity Error4 Integral Nonlinearity Error4 Voltage Divider Temperature Coefficient Full-Scale Error Zero-Scale Error | ETER DIVI1 N DNL INL ovWicrr VWFSE VWZSE | )ER MODE Specifications Apply to All VRs Code = 20H Code = 3FH Code = OOH | 6 -0.25 +0.1 +0.25 -0.75 +0.1 +0.75 20 -0.75 -0.2 0 0 +0.1 +0.75 | Bits LSB LSB ppm/YC LSB LSB |
| RESISTOR TERMINALS Voltage Range5 Capacitance6 Ax, Bx Capacitance6 Wx Shutdown Supply Currenti Shutdown Wiper Resistance | VA, VB, VW CA, CB CW IA_SD RW_SD | f = 1 MHz, Measured to GND, Code = 20H f = 1 MHz, Measured to GND, Code = 20H VA = VDD, VB = O V, SHDN = 0 VA = VDD, VB = O V, SHDN = 0, VDD = +5 V | 0 VDD 75 120 0.01 5 45 100 | V pF pF l |
| DIGITAL INPUTS AND OUTPUTS Input Logic High Input Logic Low Input Logic High Input Logic Low Output Logic High Output Logic Low Input Current Input Capacitance6 | VIH VIL VIH VIL VOH VOL IIL CIL | VDD = +5 V VDD = +5 V VDD = +3 V VDD = +3 V RL = 2.2 kl to VDD IOL = 1.6 mA, VDD = +5 V VIN = O V or +5 V, VDD = +5 V | 2.4 0.8 2.1 0.6 VDD-O.1 0.4 +1 5 | V V V V V V pF |
| POWER SUPPLIES Power Supply Range Supply Current (CMOS) Supply Current (TTL)8 Power Dissipation (CMOS)9 Power Supply Sensitivity | VDD Range IDD IDD PDISS PSS PSS | VIH = VDD or VIL = O V VIH = 2.4 V or VIL = 0.8 V) VDD = +5.5 V VIH = VDD or VIL = O V, VDD = +5.5 V OVDD = +5 V+ 10% C7VDD = +3 V + 10% | 2.7 5.5 0.01 5 0.9 4 27.5 0.0002 0.001 0.006 0.03 | V mA ccW %/% %/% |
| DYNAMIC CHARACTERISTICS6,10 Bandwidth -3 dB Total Harmonic Distortion Vw Settling Time Resistor Noise Voltage Crosstalk" | BW_10K BW_100K THDw ts_lOK tS_lOOK eNWB CT | RAB = 10 kl RAB = 100 kl VA =1 V rms + 2 V dc, VB = 2 V dc, f= 1 kHz VA = VDDi VB = O V! +1 LSB Error Band VA = VDDi VB = O V} +1 LSB Error Band RWB = 5 kl, f = 1 kHz, RS = 0 RWB = 50 kl , f= 1 kHz, RS = 0 VA = VDDi VB = O V | 600 71 0.003 2 18 9 29 -65 | kHz kHz % nV/SdTz nV/Sd-Iz dB |
| INTERFACE TIMING CHARACTERISr Input Clock Pulsewidth Data Setup Time Data Hold Time CLK to SDO Propagation Delay13 CS Setup Time CS High Pulsewidth Reset Pulsewidth CLK FalI to CS Rise Hold Time CS Rise to Clock Rise Setup | FICS Applies tCH} tCL tDS tDH tPD tcSs tcSW tRS tCSH tcSl | to All Parts6' i2 Clock Level High or Low RL = 2.2 kl, CL < 20 pF | 10 5 5 1 25 10 10 50 0 10 | ns ns ns ns ns ns ns ns ns |
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currents, sometimes approaching as much as a tenth of their maximum load current specification when approaching dropout conditions. Despite its 300mA output rating, when enabled the ZLD0485 consumes typically only 630uA regulating normally and 3mA when the input falls too low for reg ulation.
