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MXP1044PV-B Datasheet

Type	Marking	Ordering Code	Pin Conf	guratIOn	Package
BB 659 BB 659	D D	Q62702-B0875 unmatched Q62702-B0854 inline matched	1=C	2=A	SCD-80

MXP1044PV-B Price

Symbol	Parameter	Test Conditions	Min	Typ.	Max	Unit
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = 250pA	1			V
RDS(on)	Static Drain-source On Resistance	VGS = 10V, ID = 2 A VGS = 5V, ID = 2 A		0.044 0.051	0.055 0.065

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After device reset initialization, the address and parameter data is transmitted from the CPU in 32-bit batches, 1 parameter batch and 8 address batches for a total of 9 batches (288 bits), on SDI in sync with the falling edge of the SCK clock (see "Power-ON Mode" section).

The CY2037 also contains flexible power management con- trol. The part includes both PWR_DWN and OE features with integrated pull-up resistors. The PWR_DWN and OE modes have an additional setting to determine timing (asynchronous or synchronous) with respect to the output signal.

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