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' LC single The LC signal is a sync. signal for serial trans- fer, and when LC is low, LSI remains in the stand- by condition regardless of the condition of SDo and CLo, When LC becomes high and clock CLo is sup- plied, the LSI is enabled. * CLo signal The CLo signal is the clock signal for serial trans- fer and is used to write and read serial tranpfer data SDo. . SDo signal The SDo signal is 10-bit serial transfer data of which the first 2 bits are control data and the re- maining 8 bits are data* In the read mode the SDo pin becomes an output pin and outputs the 8-bit RAM data in seriaL After the write or read mode has been executed, the lower 6 bits, Ao-As, of the RAM address are automatically incremented, but A6 and A7 do not change. ' Chip select In the LSI, the chip select code is set at "0000 , this chip is selected by the chip select code "0000" input from the SDo pin. The RAM address setting and writing and read ing of the 8-bit data is executed only for the chip selected, and once a chip is selected, it remains in the selected condition until a select code for the next chip is input. I System Configuration Example