Memory Architecture When accessing the FM24CL04, the user addresses 512 locations each with 8 data bits. These data bits are shifted serially. The 512 addresses are accessed using the two-wire protocol, which includes a slave address (to distinguish other devices), a page address, and a word address. The word address consists of 8- bits that specify one of 256 addresses. The page address is l-bit and so there are 2 pages each of 256 locations. The complete address of 9-bits specifies each byte address uniquely.
| CLASSIFICATION | MIN | MAX |
| 2SC2461A-R | 5 5 | 110 |
| 2SC2461A-O | 80 | 160 |
| 2SC2461A-Y | 120 | 240 |
| | |
