suppliers of EPF8452ALC84-3 and PDF data of EPF8452ALC84-3

INITIALIZATION Before the '8028 serializes and transmits data, it and the receiving deserializer device(s) must initialize the link. Initial- ization refers to synchronizing the Serializer's and the Dese- rializer's PLLs to local clocks. The local clocks should be the same frequency, or within the specified range if from different sources. After all devices synchronize to local clocks, the Deserializers synchronize to the Serializers as the second and final initialization step. Step l: After applying power to the serializer, the outputs are held in TRI-STATE and the on-chip power-sequencing cir- cuitry disables the internal circuits. When Vcc reaches VccOK (2.1V), the PLL in the serializer begins locking to the local clock (TCLK). A local on-board data source or other source provides the specified clock input to the TCLK pin. After locking to TCLK, the serializer is now ready to send data or SYNC patterns, depending on the level of the SYNC input or a data stream at the data inputs. The SYNC pattern sent by the serializer consists of six ones and six zeros switching at the input clock rate. Step 2: The Deserializer PLL must synchronize to the Seri- alizer to complete the initialization. (Refer to the deserializer data sheet for operation details during this step of the Initial- ization State.) The Deserializer identifies the rising clock edge in a synchronization pattern or non-repetitive data
EPF8452ALC84-3 on stock