| SPECIFICATNONS |
| | | Test Conditions Unless Specified | | |
| Parameter | Symbol | -400C < TA < +850C 3.0 V i VCHARGER < 6.5 V, VON/OFF = 1.5 V | Mina | Typb | Maxa | Unit |
| |
| External Charger Voltage | \CHARGER | | 3 0 | | 12 | V |
| Under Voltage Lockout on Charger | VUVLO | Rising Edge of Battery Charger | 2 45 | 2 6 | 2 75 |
| UVLO Hysteresis | UVLOHliST | | 70 | 90 | 110 | mV |
| I Regulated Output Voltage 4.1 V_TAP to | | VCHARGER = 5.0 V | -100c < TA < +400C | 4 050 | 4 1 | 4 150 | V |
| I VBAT | IBAT+ = 1 mA | -400C < TA < +850C | 4 025 | 4 1 | 4 150 |
| l Regu,ated Output Vo,tage 4.1 V_TAP Open | VTERM+ | MAINCHARGEREN = 5.0 v | -100c < TA < +400C | 4 150 | 4 2 | 4 250 |
| CVMODE = 5.0 V | -400C < TA < +850C | 4 125 | 4 2 | 4 250 |
| I Battery Over Voltage Protection | VOVP | Rising Edge of VBAT+ | 4 70 | 4 95 | 5 15 |
| I Battery Over Voltage Hysteresis | VOVP_HYS | | | 0 11 | |
| I Battery Minimum Operating Voltage | VBAT(min) | Rising Edge, VBAT+ Latch | 3 32 | 3 41 | 3 50 |
| | | Comparator | MAINCHARGEEN- High | -0.08 | -0.04 | -0.01 |
| 88ry Vo¨age | VOS_CB | Offset Voltage, VCHARGER - VBAT+ | MAINCHARGEEN- Low | 0 01 | 0 04 | 0 08 |
| Charger Voltage to Battery Voltage Comparator Hysteresis | | | | 0 07 | |
| Quiescent Current (Normal Mode) | IIN(VCHARGER Pin) ON-Mode | 1 mA i IBAT+ < 600 mA | | 1 | 3 | mA |
| Quiescent Current (Shutdown Mode) | IIN(VCHARGER Pin) OFF-Mode | VON/OFF = 0 V, VCHARGER = 4.5 V | | 0 1 | 1 | yA |
| | RFB1 | Pin 12 to Pin 14 | | 1 | | |
| Feedback Resistor | RFB2+ RFB3 | Pin 12 to GND | | 41 | | kQ |
| | | | VON/OFF=0V | 1 | 0 1 | 1 | |
| Battery Leakage Current | IPIN13 + IPIN14 | VBAT+= 4.2 V | VCHARGER = OV | 1 | 0 1 | 2 | yA |
| | | | | | | | |
CAT16-360J4LF on stock Power-On State. At power on, the logic circutry is reset to provide an OFF (high) at DIRECTION and an OFF (high) for El and E2 (internal) for magnetic fields less than BOP. This eliminates ambiguity when the device is powered up and either sensor detects a field between BOP and BRP. If either sensor is subjected to a field greater than BOP, the internal logic will set accordingly.
S _ L _ L V M I - I - I l l t k l u ! N O I _ L V d I S S I O t : J M O d O \ f Y O \ f d - i a \ f M O - I - l \ f
