6. We are making our continuous effort to improve the quality and reliability of our products, but semiconductor products are likely to fail with certain probability. In order prevent any injury to persons or damages to property resulting from such failure, customers should be careful enough to incorporate safety measures in their design, such as redundancy feature, fire-containment feature and fail-safe feature. We do not assume any liability or responsibility for any loss or damage arising from misuse or inappropriate use of the products.
| SYMBOL | PARAMETER | MIN | MAX | UNIT |
| VS | supply voltage (DC) | | 85 | V |
| Tmb | operating mounting base temperature | -20 | +110 | |
| Tstg | storage temperature | -40 | +125 | |
| | | | |
Under certain operating conditions, it may be desirable to control integration time independent of the line scan time (time between start pulses). This can be accomplished by the use of the Antiblooming Gate control input. When the Antiblooming Gate is held at VDD. all photodiodes are simul- taneously reset to the bias voltage on the antiblooming drain (the same voltage as the videa line bias, typically VDD/2). Conversely, when the antiblooming gate is held at VSS, the antiblooming transistor is off and the photodiodes can then Integrate photocurrent. Thus, when an active high pulse is applied to VABG, the integration time for diode 'N' then becomes the time between the negative-going transition of the antiblooming gate input to the time in which diode 'N' is read out through the diode multiplex switch.
