ADMap-1053  > ADC10061BIJ
description IC ADC 10BIT 600NS 20-CDIP
Technical/Catalog Information ADC10061BIJ
Vendor National Semiconductor
Category Integrated Circuits (ICs)
RoHS Status RoHS Non-Compliant
Other Names ADC10061BIJ ADC10061BIJ
Lead Free Status Contains Lead
Packaging Tube
Operating Temperature -40°C ~ 85°C
Package / Case 20-CDIP
Voltage Supply Source Analog and Digital
Number of Bits 10
Data Interface Parallel
Sampling Rate (Per Second) 800k

suppliers of ADC10061BIJ and PDF data of ADC10061BIJ

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
ADC10061BIJ N/A  N/A  N/A  n/a  21 
    Shenzhen Chuangxinda Electroni..
  • Contact:Jerry
  • Tel:86-755-83013088
  • Fax:
  • Email: ic@cxda.com
ADC10061BIJ NS  20-CDIP  07+  ★全新 ㊣原装 ▲现货  5600 
    Shenzhen City Qing Teng Techno..
  • Contact:xiaojun
  • Tel:86-755-83993047/83243427
  • Fax:755-82865013
  • Email: qtkj2001@163.com
ADC10061BIJ AD    2000    DIP 
ADC10061BIJ     21     
    JXJElectronicsInc
  • Contact:Ms.Guo
  • Tel:86-10-5881-8031
  • Fax:86-10-5881-8032
  • Email: cherry@jxjelec.com
ADC10061BIJ NSC    97    1000 
    B.T.Chips(HONGKONG)Electronics..
  • Contact:Ms.DannaLee
  • Tel:86-0755-29215002/26001784
  • Fax:86-0755-26001784
  • Email: dannabestlee@gmail.com
ADC10061BIJ   21       
    JXJElectronicsInc
  • Contact:Ms.Guo
  • Tel:86-10-5881-8031
  • Fax:86-10-5881-8032
  • Email: cherry@jxjelec.com

ADC10061BIJ Datasheet
( 8 P ) O S V \ I u ! P O J a i V k O d e l q q S L u n L u ! x B I A I ( 8 P ) O V V \ I U E e o J a , V k O d e l q P l ! e A y L u n L u ! x B I A I ( 8 P ) Z l a L Z s l U E e o J a M O d u o ! L i a s u l
ADC10061BIJ Price

Symbol Parameter Test Conditions Min Typ. Max Unit
llim Drain Current Limit Vin = 7V VDS = 13 V 6 1 0 1 5 A
tdlim Step Response Current Limit Vin = 7 V VDS step from o t0 13 V 1 2 20 CS
Tish Overtemperature Shutdown 1 50 oC
Ti rs Overtemperature Reset 135 oC
Eas Single Pulse Avalanche Energy starting Tj = 25 0C VDD = 24 V Vin = 7V Rgen = 1 Kl L = 10 mH 250 mJ


In order to saturate the power switch and reduce conduction losses, adequate direct base current IBl has to be provided for the lowest gain hFE at 100 0C (line scan phase). On the other hand, negative base current lB2 must be provided the transistor to turn off (retrace phase). Most of the dissipation, especially in the deflection application, occurs at switch-off so it is essential to determine the value of lB2 which minimizes power losses, fall time tf and, consequently, Tj. A new set of curves have been defined to give total power losses, ts and tf as a function of IBi at 64 KHz scanning frequencies for

Parameters Symbol Min Typ Max Unit Note
r reaUenCV Fc=l/Tc 25.175 MHz Note 7-3
Clock High Time Tckh 10 ns
Low Time Tckl 10 ns
Periodic = Line Thp 31.778 S Note 7-3
Hsync 800 1024 clock Note 7-3
Pulse Width Thpw 2 96 200 clock
Back Porch Thbp 2 49 64 clock
515 525 1024 line Note 7-3
Vsync Pulse Width Tvpw 1 2 line
Back Porch Tvbp 1 33 64 line
Data Setup Time Tds 10 ns
Hold Time Tdh 10 ns
Periodic = Line Tep 800 1024 clock
Pulse Width (H) Tepw 2 640 800 clock
Horizontal Display Periodic Thd 640 640 640 clock
Hsync-CLK Phase Difference The 10 Tc-10 ns
Vsync-Hsync Phase Difference Tvh 1 Thp-l clock