The transmitter outputs (TX+) are PECL outputs which are capable of sourcing current but not sinking it. Therefore a pull-down resistor (traditionally to VDD 2.0 V) is required to drive a LOW on the output when the output FET is turned off.The resistance of this pull- down is determined by the parametrics of the part and impedance of the signal trace. Since VDD -2.0 V is usu- ally not present in the system, the output should be ter- minated to ground (VSS) for convenience. Also, PECL outputs do not conform to ECL input levels, therefore, all high speed l/0 should be AC-coupled to eliminate mismatches in signal levels.
s 4 -128K x 8 SRAMs & 4-128Kx 8 Flash Die in One MCM s Access Times of 25ns (SRAM) and 60ns (Flash) or 35ns (SRAM) and 70ns or 90ns (Flash) s Organized as 128K x 32 0f SRAM and 128Kx 32 0f Flash Memory with Common Data Bus s Low Power CMOS s Input and Output TTL Compatible Design s MIL-PRF-38534 Compliant MCMs Available s Decoupling Capacitors and Multiple Grounds for Low Noise
| PARAMETER | MODE |
| Input voltage amplitud | 0.45 Vl0 2.4 V |
| Input rise/fall time | 10 ns |
| Input reference level | 1V2V |
| Output reference level | 0.8V2V |
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