AD7894BR-2 Datasheet| PIN | PIN NAME | DESCRIPTION | | CLK | Clock | The system clock input. All other inputs are registered to the SDRAM on the rising edge of CLK | | CKE | Clock Enable | Controls internal clock signal and when deactivated, the SDRAM will be one of the states among power down, suspend or self refresh | | cs | Chip Select | Enables or disables all inputs except CLK, CKE and DQM | | BAO, BA1 | BankAddress | Selects bank to be activated during RAS activity Selects bank to be read/written during CAS activity | | AOA11 | Address | Row Address : RAO ~ RA11, Column Address : CAO ~ CA9 Auto-precharge flag : A10 | | RAS, CAS, WE | Row Address Strobe, Col- umn Address Strobe, Write Enable | RAS, CAS and WE define the operation Refer function truth table for details | | DQM | Data Input/Output Mask | Controls output buffers in read mode and masks input data in write mode | | DQODQ7 | Data Input/Output | M ultiplexed data input / output pin | | VDDNSS | Power Supply/Ground | Power supply for internal circuits and input buffers | | VDDQ/VSSQ | Data Output Power/Ground | Power supply for output buffers | | NC | No Connection | No connection | | | |
AD7894BR-2 Price (1) Filter condition: THD+N: 20-Hz HPF, 20-kHz apogee LPF Dynamic range: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted Signal-to-noise ratio: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted Channel separation: 20-Hz HPF, 20-kHz AES17 LPF Analog performance specifications are measured using the System TwoT' Cascade audio measurement system by Audio PrecisionTM in the averaging mode. (2) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 33. (3) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 34. AD7894BR-2 on stock| SYMBOL | PARAMETER | CONDITIONS | MIN | TYP. | MAX | UNIT | | V(BR)CBO | collector-base breakdown voltage | lc = 2.5 IE = 0 | 9 | | | V | | V(BR)CEO | collector-emitter breakdown voltage | lc = 1 rriA; lB = 0 | 2.3 | | | V | | V(BR)EBO | emitter-base breakdown voltage | IE = 2.5 lc = 0 | 2.5 | | | V | | ICBO | collector-base leakage current | IE = 0; VCB = 4.5 V | | | 15 | nA | | hFE | DC current gain | lc = 10 rTiA; VCE = 2 V | 70 | 140 | 210 | | | Ce | collector capacitance | IE = ie = 0; VCB = 2 V; f= 1 MHz | | 150 | | fF | | Cre | feedback capacitance | lc = 0; VCB = 2 V; f= 1 MHz | | 25 | | fF | | Gmax | maximum power gain; note 1 | lc = 10 mA; VCE = 2 V; f= 2 GHz; Tamb = 25 IC | | 23 | | dB | | NF | noise figure | lc = 0.5 mA; VCE = 2 V; f= 2 GHz; Fs = Fopt | | 1 | | dB | | PL1 | output power at l dB gain compression | lc = 5 mA; VCE = 2 V; f= 2 GHz; ZS = Zs opt; ZL = ZL opt; note 2 | | 2 | | dBm | | ITO | third order intercept point | lc = 10 mA; VCE = 2 V; f= 2 GHz; ZS = Zs opt; ZL = ZL opt; note 2 | | 7 | | dBm | | | | | | | |
| | | | | | Lcoil=lOOa:H IC/IB=5 | | | | | | | (IBl=-IB2) Tc=25'C | | | le | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cn | | N | | | | | | | | | | |
MAG 0.870 0.839 0.811 0.773 0.742 0.712 0.676 0.640 0.620 0.588 0.562 0.547 0.528 0.510 0.503 0.493 0.481 0.477 0.465 0.447 0.440 0.423 0.407 0.396 0.388 0.373 0.376 0.378 0.378 0.389
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