| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact | |
| AD7837AQ/SQ | CDIP24 | AD | 05+ |
|
 |
||
| AD7837AQ/SQ | AD | 100 | 08+ |
|
|
||
| AD7837AQ/SQ | AD | CDIP24 | 100 |
|
|
AD7837AQ/SQ Price Contact Data Arrangements: 1 Form A (SPST-txl0) Wiring Diagram Code l, 3 2 Form A (DPST-KIO) Wiring Diagram Code 5. 1 Form C (SPDT) Wiring Diagram Code l, 3. 2 Form C (DPDT} Wiring Diagram Code 5. Material: Silver-nickel 90/10. Minimum Load: 12V/100mA. Expected Mechanical Life: 10 million operations. Initial Contact Resistance: 100 milliohms max @ 1A 12VDC. AD7837AQ/SQ on stock 0 0 0 0 0 0 0 8 6 4 2 ( % ) o I : J - N a U n o o i o a n o o a A J l v - 1 a RESEToutputs. During power-up,the RESEToutputs remain active until Vcc reaches the VTH threshold and will continue driving the outputs for approximately 200ms (tPURST) after reaching VTH.Afterthe tPURST timeoutinterval, the device will cease to drive the reset outputs. At this point the reset outputs will be pulled up or down by their respective pull up/ down resistors. During power-down, the RESET outputs will be active when Vcc falls below VTH. The RESET outputs will be valid so long as Vcc is >1.OV (VRVALID).
|
