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The control signals CE, CS, and R/C control the operation of the converter. The state of R/C when CE and CS are both asserted determines whether a data read (R/C = 1) or a convert (R/C = 0) is in progress. The register controlinputs, Ao and 12/8, control conversion length and data format. If a conversion is started with Ao low, a full 12-bit conversion cycle is initiated. If Ao is high during a convert start, a shorter 8-bit conversion cycle results. During data read operations, Ao determines whether the three-state buffers containing the 8 MSBs of the conversion result (Ao = 0) or the 4 LSBs (Ao = 1) are enabled. The 12/8 pin determines whether the output data is to be orga- nized as tw0 8-bit words (12F8 tied to DIGITAL COMMON) or a single 12-bit word (12F8 tied to VLOGIC) In the 8-bit mode, the byte addressed when Ao is high contains the 4 LSBs from the conversion followed by four trailing zeroes. This organiza- tion allows the data lines to be overlapped for direct interface to 8-bit buses without the need for external three-state buffers.
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