OUTPUT DRIVE ENABLE (ODE) The ODE pin is the master output control pin. Ifthe ODE input is held LOW all TDM outputs will be placed in high impedance regardless Connect Memo ry High programming. However,ifODEis HIGH,thecontents ofConnectMemory High control the output state on a per-channel basis.
3126SB Price| Pin (SOIC/MSOP/DIP) | Name | Function |
| 1 | NC | No internal connections |
| 2 | NC | No internal connections |
| 3 | RESET/RESET | Reset Output. RESET is an active LOW, open drain output which goes active whenever Vcc falls below VTRIP. It will remain active until Vcc rises above the VTRIP for tPURST RESET/RESET goes active if the Watchdog Timer is enabled and SDA remains either HIGH or LOW longer than the selectable Watchdog time out period. RESET/RESET goes active on power-uppower-up and remains active for 250ms after the power supply stabilizes. RESET is an active high open drain output. An external pull up resistor is required on the RESET/RESET pin. |
| 4 | VSS | Ground |
| 5 | SDA | Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. This pin requires a pull up resistor and the input buffer is always active (not gated). |
| 6 | SCL | Serial Clock. The Serial Clock input controls the serial bus timing for data input and output. |
| 7 | WP | Write Protect. WP HIGH prevents writes to any location in the device (including the control register). Connect WP pin to Vss when it is not used. |
| 8 | Vcc | Supply Voltage |
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3126SB on stock Note l: Please use devices on condition that the channel temperature is below 1500C Note 2: (a) Device mounted on a glass-epoxy board (a) (t = 5 s) (b) Device mounted on a glass-epoxy board (b) (t = 5 s)
| Symbol | Parameter | Test Conditions | Min | Typ. | Max | Unit |
| gfs | Forward Transconductance | VDS = 13 V ID = 30 A | | 40 | | S |
| Coss | Output Capacitance | VDS = 13 V f= 1 MHz Vin = 0 | | 1800 | 3000 | pF |
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